1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
|
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2018-2021 Damien P. George
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include "py/runtime.h"
#include "shared/runtime/semihosting_arm.h"
#include "uart.h"
extern uint32_t _estack, _sidata, _sdata, _edata, _sbss, _ebss;
__attribute__((naked)) void Reset_Handler(void) {
// set stack pointer
__asm volatile ("ldr r0, =_estack");
__asm volatile ("mov sp, r0");
// copy .data section from flash to RAM
for (uint32_t *src = &_sidata, *dest = &_sdata; dest < &_edata;) {
*dest++ = *src++;
}
// zero out .bss section
for (uint32_t *dest = &_sbss; dest < &_ebss;) {
*dest++ = 0;
}
// jump to board initialisation
void _start(void);
_start();
}
MP_NORETURN void Default_Handler(void) {
for (;;) {
}
}
#if defined(__ARM_ARCH_ISA_ARM)
// ARM architecture with standard ARM ISA.
__attribute__((naked, section(".isr_vector"))) void isr_vector(void) {
__asm volatile (
"b Reset_Handler\n"
"b Default_Handler\n"
"b Default_Handler\n"
"b Default_Handler\n"
"b Default_Handler\n"
"nop\n"
"b Default_Handler\n"
"b Default_Handler\n"
);
}
#elif defined(__ARM_ARCH_ISA_THUMB)
extern void NMI_Handler(void);
extern void HardFault_Handler(void);
extern void MemManage_Handler(void);
extern void BusFault_Handler(void);
extern void UsageFault_Handler(void);
extern void SVC_Handler(void);
extern void DebugMon_Handler(void);
extern void PendSV_Handler(void);
extern void SysTick_Handler(void);
// ARM architecture with Thumb-only ISA.
const uint32_t isr_vector[] __attribute__((section(".isr_vector"))) = {
(uint32_t)&_estack,
(uint32_t)&Reset_Handler,
(uint32_t)&NMI_Handler,
(uint32_t)&HardFault_Handler,
(uint32_t)&MemManage_Handler,
(uint32_t)&BusFault_Handler,
(uint32_t)&UsageFault_Handler,
0,
0,
0,
0,
(uint32_t)&SVC_Handler,
(uint32_t)&DebugMon_Handler,
0,
(uint32_t)&PendSV_Handler,
(uint32_t)&SysTick_Handler,
};
#endif
void _start(void) {
mp_semihosting_init();
// Enable the UART
uart_init();
// Now that we have a basic system up and running we can call main
extern int main();
main(0, 0);
// Finished
exit(0);
}
void exit(int status) {
// Force qemu to exit using ARM Semihosting
mp_semihosting_exit(status);
for (;;) {
}
}
#ifndef NDEBUG
void __assert_func(const char *file, int line, const char *func, const char *expr) {
(void)func;
printf("Assertion '%s' failed, at file %s:%d\n", expr, file, line);
exit(1);
}
#endif
|
