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-rw-r--r--tests/extmod_hardware/machine_uart_irq_break.py62
-rw-r--r--tests/extmod_hardware/machine_uart_irq_break.py.exp15
-rw-r--r--tests/extmod_hardware/machine_uart_irq_rx.py78
-rw-r--r--tests/extmod_hardware/machine_uart_irq_rx.py.exp12
-rw-r--r--tests/extmod_hardware/machine_uart_irq_rxidle.py70
-rw-r--r--tests/extmod_hardware/machine_uart_irq_rxidle.py.exp12
6 files changed, 249 insertions, 0 deletions
diff --git a/tests/extmod_hardware/machine_uart_irq_break.py b/tests/extmod_hardware/machine_uart_irq_break.py
new file mode 100644
index 0000000000..82879c1d6e
--- /dev/null
+++ b/tests/extmod_hardware/machine_uart_irq_break.py
@@ -0,0 +1,62 @@
+# Test machine.UART.IRQ_BREAK firing after a break is received.
+#
+# IMPORTANT: This test requires hardware connections: the UART TX and RX
+# pins must be wired together.
+
+try:
+ from machine import UART
+
+ UART.IRQ_BREAK
+except (ImportError, AttributeError):
+ print("SKIP")
+ raise SystemExit
+
+import time, sys
+
+# Configure pins based on the target.
+if "esp32" in sys.platform:
+ if "ESP32S2" in sys.implementation._machine or "ESP32C3" in sys.implementation._machine:
+ print("SKIP")
+ raise SystemExit
+ # ESP32 needs separate UART instances for the test
+ recv_uart_id = 1
+ recv_tx_pin = 14
+ recv_rx_pin = 5
+ send_uart_id = 2
+ send_tx_pin = 4
+ send_rx_pin = 12
+elif "rp2" in sys.platform:
+ recv_uart_id = 0
+ send_uart_id = 0
+ recv_tx_pin = "GPIO0"
+ recv_rx_pin = "GPIO1"
+else:
+ print("Please add support for this test on this platform.")
+ raise SystemExit
+
+
+def irq(u):
+ print("IRQ_BREAK:", bool(u.irq().flags() & u.IRQ_BREAK), "data:", u.read(1))
+
+
+# Test that the IRQ is called for each break received.
+for bits_per_s in (2400, 9600, 57600):
+ recv_uart = UART(recv_uart_id, bits_per_s, tx=recv_tx_pin, rx=recv_rx_pin)
+ if recv_uart_id != send_uart_id:
+ send_uart = UART(send_uart_id, bits_per_s, tx=send_tx_pin, rx=send_rx_pin)
+ else:
+ send_uart = recv_uart
+
+ recv_uart.irq(irq, recv_uart.IRQ_BREAK)
+
+ print("write", bits_per_s)
+ for i in range(3):
+ send_uart.write(str(i))
+ send_uart.flush()
+ time.sleep_ms(10)
+ send_uart.sendbreak()
+ time.sleep_ms(10)
+ if "esp32" in sys.platform:
+ # On esp32 a read is needed to read in the break byte.
+ recv_uart.read()
+ print("done")
diff --git a/tests/extmod_hardware/machine_uart_irq_break.py.exp b/tests/extmod_hardware/machine_uart_irq_break.py.exp
new file mode 100644
index 0000000000..ca8afe8f2b
--- /dev/null
+++ b/tests/extmod_hardware/machine_uart_irq_break.py.exp
@@ -0,0 +1,15 @@
+write 2400
+IRQ_BREAK: True data: b'0'
+IRQ_BREAK: True data: b'1'
+IRQ_BREAK: True data: b'2'
+done
+write 9600
+IRQ_BREAK: True data: b'0'
+IRQ_BREAK: True data: b'1'
+IRQ_BREAK: True data: b'2'
+done
+write 57600
+IRQ_BREAK: True data: b'0'
+IRQ_BREAK: True data: b'1'
+IRQ_BREAK: True data: b'2'
+done
diff --git a/tests/extmod_hardware/machine_uart_irq_rx.py b/tests/extmod_hardware/machine_uart_irq_rx.py
new file mode 100644
index 0000000000..bf34900bd0
--- /dev/null
+++ b/tests/extmod_hardware/machine_uart_irq_rx.py
@@ -0,0 +1,78 @@
+# Test machine.UART.IRQ_RX firing for each character received.
+#
+# IMPORTANT: This test requires hardware connections: the UART TX and RX
+# pins must be wired together.
+
+try:
+ from machine import UART
+
+ UART.IRQ_RX
+except (ImportError, AttributeError):
+ print("SKIP")
+ raise SystemExit
+
+import time, sys
+
+byte_by_byte = False
+# Configure pins based on the target.
+if "esp32" in sys.platform:
+ uart_id = 1
+ tx_pin = 4
+ rx_pin = 5
+elif "pyboard" in sys.platform:
+ uart_id = 4
+ tx_pin = None # PA0
+ rx_pin = None # PA1
+elif "samd" in sys.platform and "ItsyBitsy M0" in sys.implementation._machine:
+ uart_id = 0
+ tx_pin = "D1"
+ rx_pin = "D0"
+ byte_by_byte = True
+elif "samd" in sys.platform and "ItsyBitsy M4" in sys.implementation._machine:
+ uart_id = 3
+ tx_pin = "D1"
+ rx_pin = "D0"
+elif "nrf" in sys.platform:
+ uart_id = 0
+ tx_pin = None
+ rx_pin = None
+elif "renesas-ra" in sys.platform:
+ uart_id = 9
+ tx_pin = None # P602 @ RA6M2
+ rx_pin = None # P601 @ RA6M2
+elif "CC3200" in sys.implementation._machine:
+ # CC3200 doesn't work because it's too slow and has an allocation error in the handler.
+ print("SKIP")
+ raise SystemExit
+else:
+ print("Please add support for this test on this platform.")
+ raise SystemExit
+
+
+def irq(u):
+ print("IRQ_RX:", bool(u.irq().flags() & u.IRQ_RX), "data:", u.read(1))
+
+
+text = "1234"
+
+# Test that the IRQ is called for each byte received.
+# Use slow baudrates so that the IRQ has time to run.
+for bits_per_s in (2400, 9600):
+ if tx_pin is None:
+ uart = UART(uart_id, bits_per_s)
+ else:
+ uart = UART(uart_id, bits_per_s, tx=tx_pin, rx=rx_pin)
+
+ uart.irq(irq, uart.IRQ_RX)
+
+ print("write", bits_per_s)
+ if byte_by_byte:
+ # slow devices need data to be sent slow
+ for c in text:
+ uart.write(c)
+ uart.flush()
+ else:
+ uart.write(text)
+ uart.flush()
+ time.sleep_ms(100)
+ print("done")
diff --git a/tests/extmod_hardware/machine_uart_irq_rx.py.exp b/tests/extmod_hardware/machine_uart_irq_rx.py.exp
new file mode 100644
index 0000000000..945b1e508f
--- /dev/null
+++ b/tests/extmod_hardware/machine_uart_irq_rx.py.exp
@@ -0,0 +1,12 @@
+write 2400
+IRQ_RX: True data: b'1'
+IRQ_RX: True data: b'2'
+IRQ_RX: True data: b'3'
+IRQ_RX: True data: b'4'
+done
+write 9600
+IRQ_RX: True data: b'1'
+IRQ_RX: True data: b'2'
+IRQ_RX: True data: b'3'
+IRQ_RX: True data: b'4'
+done
diff --git a/tests/extmod_hardware/machine_uart_irq_rxidle.py b/tests/extmod_hardware/machine_uart_irq_rxidle.py
new file mode 100644
index 0000000000..182ab24ebe
--- /dev/null
+++ b/tests/extmod_hardware/machine_uart_irq_rxidle.py
@@ -0,0 +1,70 @@
+# Test machine.UART.IRQ_RXIDLE firing after a set of characters are received.
+#
+# IMPORTANT: This test requires hardware connections: the UART TX and RX
+# pins must be wired together.
+
+try:
+ from machine import UART
+
+ UART.IRQ_RXIDLE
+except (ImportError, AttributeError):
+ print("SKIP")
+ raise SystemExit
+
+import time, sys
+
+# Configure pins based on the target.
+if "esp32" in sys.platform:
+ uart_id = 1
+ tx_pin = 4
+ rx_pin = 5
+elif "mimxrt" in sys.platform:
+ uart_id = 1
+ tx_pin = None
+elif "pyboard" in sys.platform:
+ uart_id = 4
+ tx_pin = None # PA0
+ rx_pin = None # PA1
+elif "renesas-ra" in sys.platform:
+ uart_id = 9
+ tx_pin = None # P602 @ RA6M2
+ rx_pin = None # P601 @ RA6M2
+elif "rp2" in sys.platform:
+ uart_id = 0
+ tx_pin = "GPIO0"
+ rx_pin = "GPIO1"
+elif "samd" in sys.platform and "ItsyBitsy M0" in sys.implementation._machine:
+ uart_id = 0
+ tx_pin = "D1"
+ rx_pin = "D0"
+ byte_by_byte = True
+elif "samd" in sys.platform and "ItsyBitsy M4" in sys.implementation._machine:
+ uart_id = 3
+ tx_pin = "D1"
+ rx_pin = "D0"
+else:
+ print("Please add support for this test on this platform.")
+ raise SystemExit
+
+
+def irq(u):
+ print("IRQ_RXIDLE:", bool(u.irq().flags() & u.IRQ_RXIDLE), "data:", u.read())
+
+
+text = "12345678"
+
+# Test that the IRQ is called for each set of byte received.
+for bits_per_s in (2400, 9600, 115200):
+ if tx_pin is None:
+ uart = UART(uart_id, bits_per_s)
+ else:
+ uart = UART(uart_id, bits_per_s, tx=tx_pin, rx=rx_pin)
+
+ uart.irq(irq, uart.IRQ_RXIDLE)
+
+ print("write", bits_per_s)
+ uart.write(text)
+ uart.flush()
+ print("ready")
+ time.sleep_ms(100)
+ print("done")
diff --git a/tests/extmod_hardware/machine_uart_irq_rxidle.py.exp b/tests/extmod_hardware/machine_uart_irq_rxidle.py.exp
new file mode 100644
index 0000000000..ce1890a06a
--- /dev/null
+++ b/tests/extmod_hardware/machine_uart_irq_rxidle.py.exp
@@ -0,0 +1,12 @@
+write 2400
+ready
+IRQ_RXIDLE: True data: b'12345678'
+done
+write 9600
+ready
+IRQ_RXIDLE: True data: b'12345678'
+done
+write 115200
+ready
+IRQ_RXIDLE: True data: b'12345678'
+done