diff options
Diffstat (limited to 'stmhal/hal/f7/inc/stm32f7xx_hal_spi.h')
| -rw-r--r-- | stmhal/hal/f7/inc/stm32f7xx_hal_spi.h | 395 |
1 files changed, 194 insertions, 201 deletions
diff --git a/stmhal/hal/f7/inc/stm32f7xx_hal_spi.h b/stmhal/hal/f7/inc/stm32f7xx_hal_spi.h index ef1f100344..abda07e7de 100644 --- a/stmhal/hal/f7/inc/stm32f7xx_hal_spi.h +++ b/stmhal/hal/f7/inc/stm32f7xx_hal_spi.h @@ -1,14 +1,14 @@ - /** +/** ****************************************************************************** * @file stm32f7xx_hal_spi.h * @author MCD Application Team - * @version V1.0.1 - * @date 25-June-2015 + * @version V1.1.2 + * @date 23-September-2016 * @brief Header file of SPI HAL module. ****************************************************************************** * @attention * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> + * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> * * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: @@ -40,7 +40,7 @@ #define __STM32F7xx_HAL_SPI_H #ifdef __cplusplus - extern "C" { +extern "C" { #endif /* Includes ------------------------------------------------------------------*/ @@ -64,48 +64,48 @@ */ typedef struct { - uint32_t Mode; /*!< Specifies the SPI operating mode. + uint32_t Mode; /*!< Specifies the SPI operating mode. This parameter can be a value of @ref SPI_Mode */ - uint32_t Direction; /*!< Specifies the SPI bidirectional mode state. + uint32_t Direction; /*!< Specifies the SPI bidirectional mode state. This parameter can be a value of @ref SPI_Direction */ - uint32_t DataSize; /*!< Specifies the SPI data size. + uint32_t DataSize; /*!< Specifies the SPI data size. This parameter can be a value of @ref SPI_Data_Size */ - uint32_t CLKPolarity; /*!< Specifies the serial clock steady state. + uint32_t CLKPolarity; /*!< Specifies the serial clock steady state. This parameter can be a value of @ref SPI_Clock_Polarity */ - uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture. + uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture. This parameter can be a value of @ref SPI_Clock_Phase */ - uint32_t NSS; /*!< Specifies whether the NSS signal is managed by + uint32_t NSS; /*!< Specifies whether the NSS signal is managed by hardware (NSS pin) or by software using the SSI bit. This parameter can be a value of @ref SPI_Slave_Select_management */ - uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be + uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be used to configure the transmit and receive SCK clock. This parameter can be a value of @ref SPI_BaudRate_Prescaler @note The communication clock is derived from the master clock. The slave clock does not need to be set. */ - uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. + uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. This parameter can be a value of @ref SPI_MSB_LSB_transmission */ - uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not . + uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not. This parameter can be a value of @ref SPI_TI_mode */ - uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not. + uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not. This parameter can be a value of @ref SPI_CRC_Calculation */ - uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. - This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */ + uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. + This parameter must be an odd number between Min_Data = 0 and Max_Data = 65535 */ - uint32_t CRCLength; /*!< Specifies the CRC Length used for the CRC calculation. + uint32_t CRCLength; /*!< Specifies the CRC Length used for the CRC calculation. CRC Length is only used with Data8 and Data16, not other data size This parameter can be a value of @ref SPI_CRC_length */ - uint32_t NSSPMode; /*!< Specifies whether the NSSP signal is enabled or not . + uint32_t NSSPMode; /*!< Specifies whether the NSSP signal is enabled or not . This parameter can be a value of @ref SPI_NSSP_Mode This mode is activated by the NSSP bit in the SPIx_CR2 register and it takes effect only if the SPI interface is configured as Motorola SPI @@ -114,57 +114,58 @@ typedef struct } SPI_InitTypeDef; /** - * @brief HAL State structures definition + * @brief HAL SPI State structure definition */ typedef enum { - HAL_SPI_STATE_RESET = 0x00, /*!< Peripheral not Initialized */ - HAL_SPI_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ - HAL_SPI_STATE_BUSY = 0x02, /*!< an internal process is ongoing */ - HAL_SPI_STATE_BUSY_TX = 0x03, /*!< Data Transmission process is ongoing */ - HAL_SPI_STATE_BUSY_RX = 0x04, /*!< Data Reception process is ongoing */ - HAL_SPI_STATE_BUSY_TX_RX = 0x05, /*!< Data Transmission and Reception process is ongoing*/ - HAL_SPI_STATE_ERROR = 0x06 /*!< SPI error state */ -}HAL_SPI_StateTypeDef; + HAL_SPI_STATE_RESET = 0x00U, /*!< Peripheral not Initialized */ + HAL_SPI_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ + HAL_SPI_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */ + HAL_SPI_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */ + HAL_SPI_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */ + HAL_SPI_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */ + HAL_SPI_STATE_ERROR = 0x06U, /*!< SPI error state */ + HAL_SPI_STATE_ABORT = 0x07U /*!< SPI abort is ongoing */ +} HAL_SPI_StateTypeDef; /** * @brief SPI handle Structure definition */ typedef struct __SPI_HandleTypeDef { - SPI_TypeDef *Instance; /* SPI registers base address */ + SPI_TypeDef *Instance; /*!< SPI registers base address */ - SPI_InitTypeDef Init; /* SPI communication parameters */ + SPI_InitTypeDef Init; /*!< SPI communication parameters */ - uint8_t *pTxBuffPtr; /* Pointer to SPI Tx transfer Buffer */ + uint8_t *pTxBuffPtr; /*!< Pointer to SPI Tx transfer Buffer */ - uint16_t TxXferSize; /* SPI Tx Transfer size */ + uint16_t TxXferSize; /*!< SPI Tx Transfer size */ - uint16_t TxXferCount; /* SPI Tx Transfer Counter */ + __IO uint16_t TxXferCount; /*!< SPI Tx Transfer Counter */ - uint8_t *pRxBuffPtr; /* Pointer to SPI Rx transfer Buffer */ + uint8_t *pRxBuffPtr; /*!< Pointer to SPI Rx transfer Buffer */ - uint16_t RxXferSize; /* SPI Rx Transfer size */ + uint16_t RxXferSize; /*!< SPI Rx Transfer size */ - uint16_t RxXferCount; /* SPI Rx Transfer Counter */ + __IO uint16_t RxXferCount; /*!< SPI Rx Transfer Counter */ - uint32_t CRCSize; /* SPI CRC size used for the transfer */ + uint32_t CRCSize; /*!< SPI CRC size used for the transfer */ - void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /* function pointer on Rx IRQ handler */ + void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Rx ISR */ - void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /* function pointer on Tx IRQ handler */ + void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /*!< function pointer on Tx ISR */ - DMA_HandleTypeDef *hdmatx; /* SPI Tx DMA Handle parameters */ + DMA_HandleTypeDef *hdmatx; /*!< SPI Tx DMA Handle parameters */ - DMA_HandleTypeDef *hdmarx; /* SPI Rx DMA Handle parameters */ + DMA_HandleTypeDef *hdmarx; /*!< SPI Rx DMA Handle parameters */ - HAL_LockTypeDef Lock; /* Locking object */ + HAL_LockTypeDef Lock; /*!< Locking object */ - HAL_SPI_StateTypeDef State; /* SPI communication state */ + __IO HAL_SPI_StateTypeDef State; /*!< SPI communication state */ - uint32_t ErrorCode; /* SPI Error code */ + __IO uint32_t ErrorCode; /*!< SPI Error code */ -}SPI_HandleTypeDef; +} SPI_HandleTypeDef; /** * @} @@ -179,23 +180,22 @@ typedef struct __SPI_HandleTypeDef /** @defgroup SPI_Error_Code SPI Error Code * @{ */ -#define HAL_SPI_ERROR_NONE (uint32_t)0x00000000 /*!< No error */ -#define HAL_SPI_ERROR_MODF (uint32_t)0x00000001 /*!< MODF error */ -#define HAL_SPI_ERROR_CRC (uint32_t)0x00000002 /*!< CRC error */ -#define HAL_SPI_ERROR_OVR (uint32_t)0x00000004 /*!< OVR error */ -#define HAL_SPI_ERROR_FRE (uint32_t)0x00000008 /*!< FRE error */ -#define HAL_SPI_ERROR_DMA (uint32_t)0x00000010 /*!< DMA transfer error */ -#define HAL_SPI_ERROR_FLAG (uint32_t)0x00000020 /*!< Error on BSY/TXE/FTLVL/FRLVL Flag */ -#define HAL_SPI_ERROR_UNKNOW (uint32_t)0x00000040 /*!< Unknow Error error */ +#define HAL_SPI_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ +#define HAL_SPI_ERROR_MODF ((uint32_t)0x00000001U) /*!< MODF error */ +#define HAL_SPI_ERROR_CRC ((uint32_t)0x00000002U) /*!< CRC error */ +#define HAL_SPI_ERROR_OVR ((uint32_t)0x00000004U) /*!< OVR error */ +#define HAL_SPI_ERROR_FRE ((uint32_t)0x00000008U) /*!< FRE error */ +#define HAL_SPI_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */ +#define HAL_SPI_ERROR_FLAG ((uint32_t)0x00000020U) /*!< Error on RXNE/TXE/BSY/FTLVL/FRLVL Flag */ +#define HAL_SPI_ERROR_ABORT ((uint32_t)0x00000040U) /*!< Error during SPI Abort procedure */ /** * @} */ - /** @defgroup SPI_Mode SPI Mode * @{ */ -#define SPI_MODE_SLAVE ((uint32_t)0x00000000) +#define SPI_MODE_SLAVE ((uint32_t)0x00000000U) #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI) /** * @} @@ -204,7 +204,7 @@ typedef struct __SPI_HandleTypeDef /** @defgroup SPI_Direction SPI Direction Mode * @{ */ -#define SPI_DIRECTION_2LINES ((uint32_t)0x00000000) +#define SPI_DIRECTION_2LINES ((uint32_t)0x00000000U) #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE /** @@ -214,19 +214,19 @@ typedef struct __SPI_HandleTypeDef /** @defgroup SPI_Data_Size SPI Data Size * @{ */ -#define SPI_DATASIZE_4BIT ((uint32_t)0x0300) -#define SPI_DATASIZE_5BIT ((uint32_t)0x0400) -#define SPI_DATASIZE_6BIT ((uint32_t)0x0500) -#define SPI_DATASIZE_7BIT ((uint32_t)0x0600) -#define SPI_DATASIZE_8BIT ((uint32_t)0x0700) -#define SPI_DATASIZE_9BIT ((uint32_t)0x0800) -#define SPI_DATASIZE_10BIT ((uint32_t)0x0900) -#define SPI_DATASIZE_11BIT ((uint32_t)0x0A00) -#define SPI_DATASIZE_12BIT ((uint32_t)0x0B00) -#define SPI_DATASIZE_13BIT ((uint32_t)0x0C00) -#define SPI_DATASIZE_14BIT ((uint32_t)0x0D00) -#define SPI_DATASIZE_15BIT ((uint32_t)0x0E00) -#define SPI_DATASIZE_16BIT ((uint32_t)0x0F00) +#define SPI_DATASIZE_4BIT ((uint32_t)0x00000300U) +#define SPI_DATASIZE_5BIT ((uint32_t)0x00000400U) +#define SPI_DATASIZE_6BIT ((uint32_t)0x00000500U) +#define SPI_DATASIZE_7BIT ((uint32_t)0x00000600U) +#define SPI_DATASIZE_8BIT ((uint32_t)0x00000700U) +#define SPI_DATASIZE_9BIT ((uint32_t)0x00000800U) +#define SPI_DATASIZE_10BIT ((uint32_t)0x00000900U) +#define SPI_DATASIZE_11BIT ((uint32_t)0x00000A00U) +#define SPI_DATASIZE_12BIT ((uint32_t)0x00000B00U) +#define SPI_DATASIZE_13BIT ((uint32_t)0x00000C00U) +#define SPI_DATASIZE_14BIT ((uint32_t)0x00000D00U) +#define SPI_DATASIZE_15BIT ((uint32_t)0x00000E00U) +#define SPI_DATASIZE_16BIT ((uint32_t)0x00000F00U) /** * @} */ @@ -234,7 +234,7 @@ typedef struct __SPI_HandleTypeDef /** @defgroup SPI_Clock_Polarity SPI Clock Polarity * @{ */ -#define SPI_POLARITY_LOW ((uint32_t)0x00000000) +#define SPI_POLARITY_LOW ((uint32_t)0x00000000U) #define SPI_POLARITY_HIGH SPI_CR1_CPOL /** * @} @@ -243,18 +243,18 @@ typedef struct __SPI_HandleTypeDef /** @defgroup SPI_Clock_Phase SPI Clock Phase * @{ */ -#define SPI_PHASE_1EDGE ((uint32_t)0x00000000) +#define SPI_PHASE_1EDGE ((uint32_t)0x00000000U) #define SPI_PHASE_2EDGE SPI_CR1_CPHA /** * @} */ -/** @defgroup SPI_Slave_Select_management SPI Slave Select management +/** @defgroup SPI_Slave_Select_management SPI Slave Select Management * @{ */ #define SPI_NSS_SOFT SPI_CR1_SSM -#define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000) -#define SPI_NSS_HARD_OUTPUT ((uint32_t)0x00040000) +#define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000U) +#define SPI_NSS_HARD_OUTPUT ((uint32_t)0x00040000U) /** * @} */ @@ -263,7 +263,7 @@ typedef struct __SPI_HandleTypeDef * @{ */ #define SPI_NSS_PULSE_ENABLE SPI_CR2_NSSP -#define SPI_NSS_PULSE_DISABLE ((uint32_t)0x00000000) +#define SPI_NSS_PULSE_DISABLE ((uint32_t)0x00000000U) /** * @} */ @@ -271,31 +271,31 @@ typedef struct __SPI_HandleTypeDef /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler * @{ */ -#define SPI_BAUDRATEPRESCALER_2 ((uint32_t)0x00000000) -#define SPI_BAUDRATEPRESCALER_4 ((uint32_t)0x00000008) -#define SPI_BAUDRATEPRESCALER_8 ((uint32_t)0x00000010) -#define SPI_BAUDRATEPRESCALER_16 ((uint32_t)0x00000018) -#define SPI_BAUDRATEPRESCALER_32 ((uint32_t)0x00000020) -#define SPI_BAUDRATEPRESCALER_64 ((uint32_t)0x00000028) -#define SPI_BAUDRATEPRESCALER_128 ((uint32_t)0x00000030) -#define SPI_BAUDRATEPRESCALER_256 ((uint32_t)0x00000038) +#define SPI_BAUDRATEPRESCALER_2 ((uint32_t)0x00000000U) +#define SPI_BAUDRATEPRESCALER_4 ((uint32_t)0x00000008U) +#define SPI_BAUDRATEPRESCALER_8 ((uint32_t)0x00000010U) +#define SPI_BAUDRATEPRESCALER_16 ((uint32_t)0x00000018U) +#define SPI_BAUDRATEPRESCALER_32 ((uint32_t)0x00000020U) +#define SPI_BAUDRATEPRESCALER_64 ((uint32_t)0x00000028U) +#define SPI_BAUDRATEPRESCALER_128 ((uint32_t)0x00000030U) +#define SPI_BAUDRATEPRESCALER_256 ((uint32_t)0x00000038U) /** * @} */ -/** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB transmission +/** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB Transmission * @{ */ -#define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000) +#define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000U) #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST /** * @} */ -/** @defgroup SPI_TI_mode SPI TI mode +/** @defgroup SPI_TI_mode SPI TI Mode * @{ */ -#define SPI_TIMODE_DISABLE ((uint32_t)0x00000000) +#define SPI_TIMODE_DISABLE ((uint32_t)0x00000000U) #define SPI_TIMODE_ENABLE SPI_CR2_FRF /** * @} @@ -304,7 +304,7 @@ typedef struct __SPI_HandleTypeDef /** @defgroup SPI_CRC_Calculation SPI CRC Calculation * @{ */ -#define SPI_CRCCALCULATION_DISABLE ((uint32_t)0x00000000) +#define SPI_CRCCALCULATION_DISABLE ((uint32_t)0x00000000U) #define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN /** * @} @@ -317,9 +317,9 @@ typedef struct __SPI_HandleTypeDef * SPI_CRC_LENGTH_8BIT : CRC 8bit * SPI_CRC_LENGTH_16BIT : CRC 16bit */ -#define SPI_CRC_LENGTH_DATASIZE ((uint32_t)0x00000000) -#define SPI_CRC_LENGTH_8BIT ((uint32_t)0x00000001) -#define SPI_CRC_LENGTH_16BIT ((uint32_t)0x00000002) +#define SPI_CRC_LENGTH_DATASIZE ((uint32_t)0x00000000U) +#define SPI_CRC_LENGTH_8BIT ((uint32_t)0x00000001U) +#define SPI_CRC_LENGTH_16BIT ((uint32_t)0x00000002U) /** * @} */ @@ -334,16 +334,13 @@ typedef struct __SPI_HandleTypeDef * level is greater or equal to 1/4(8 bits). */ #define SPI_RXFIFO_THRESHOLD SPI_CR2_FRXTH #define SPI_RXFIFO_THRESHOLD_QF SPI_CR2_FRXTH -#define SPI_RXFIFO_THRESHOLD_HF ((uint32_t)0x00000000) +#define SPI_RXFIFO_THRESHOLD_HF ((uint32_t)0x00000000U) /** * @} */ -/** @defgroup SPI_Interrupt_configuration_definition SPI Interrupt configuration definition - * @brief SPI Interrupt definition - * Elements values convention: 0xXXXXXXXX - * - XXXXXXXX : Interrupt control mask +/** @defgroup SPI_Interrupt_definition SPI Interrupt Definition * @{ */ #define SPI_IT_TXE SPI_CR2_TXEIE @@ -353,23 +350,18 @@ typedef struct __SPI_HandleTypeDef * @} */ - -/** @defgroup SPI_Flag_definition SPI Flag definition - * @brief Flag definition - * Elements values convention: 0xXXXXYYYY - * - XXXX : Flag register Index - * - YYYY : Flag mask +/** @defgroup SPI_Flags_definition SPI Flags Definition * @{ */ -#define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */ -#define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */ -#define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */ -#define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */ -#define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */ -#define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */ +#define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */ +#define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */ +#define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */ +#define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */ +#define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */ +#define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */ #define SPI_FLAG_FRE SPI_SR_FRE /* SPI Error flag: TI mode frame format error flag */ -#define SPI_FLAG_FTLVL SPI_SR_FTLVL /* SPI fifo transmission level */ -#define SPI_FLAG_FRLVL SPI_SR_FRLVL /* SPI fifo reception level */ +#define SPI_FLAG_FTLVL SPI_SR_FTLVL /* SPI fifo transmission level */ +#define SPI_FLAG_FRLVL SPI_SR_FRLVL /* SPI fifo reception level */ /** * @} */ @@ -377,10 +369,10 @@ typedef struct __SPI_HandleTypeDef /** @defgroup SPI_transmission_fifo_status_level SPI Transmission FIFO Status Level * @{ */ -#define SPI_FTLVL_EMPTY ((uint32_t)0x0000) -#define SPI_FTLVL_QUARTER_FULL ((uint32_t)0x0800) -#define SPI_FTLVL_HALF_FULL ((uint32_t)0x1000) -#define SPI_FTLVL_FULL ((uint32_t)0x1800) +#define SPI_FTLVL_EMPTY ((uint32_t)0x00000000U) +#define SPI_FTLVL_QUARTER_FULL ((uint32_t)0x00000800U) +#define SPI_FTLVL_HALF_FULL ((uint32_t)0x00001000U) +#define SPI_FTLVL_FULL ((uint32_t)0x00001800U) /** * @} @@ -389,34 +381,31 @@ typedef struct __SPI_HandleTypeDef /** @defgroup SPI_reception_fifo_status_level SPI Reception FIFO Status Level * @{ */ -#define SPI_FRLVL_EMPTY ((uint32_t)0x0000) -#define SPI_FRLVL_QUARTER_FULL ((uint32_t)0x0200) -#define SPI_FRLVL_HALF_FULL ((uint32_t)0x0400) -#define SPI_FRLVL_FULL ((uint32_t)0x0600) +#define SPI_FRLVL_EMPTY ((uint32_t)0x00000000U) +#define SPI_FRLVL_QUARTER_FULL ((uint32_t)0x00000200U) +#define SPI_FRLVL_HALF_FULL ((uint32_t)0x00000400U) +#define SPI_FRLVL_FULL ((uint32_t)0x00000600U) /** * @} */ -/** - * @} - */ - -/* Exported macros ------------------------------------------------------------*/ +/* Exported macros -----------------------------------------------------------*/ /** @defgroup SPI_Exported_Macros SPI Exported Macros * @{ */ -/** @brief Reset SPI handle state - * @param __HANDLE__: SPI handle. +/** @brief Reset SPI handle state. + * @param __HANDLE__: specifies the SPI Handle. + * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. * @retval None */ #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET) -/** @brief Enables or disables the specified SPI interrupts. - * @param __HANDLE__ : specifies the SPI Handle. +/** @brief Enable or disable the specified SPI interrupts. + * @param __HANDLE__: specifies the SPI Handle. * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. - * @param __INTERRUPT__ : specifies the interrupt source to enable or disable. - * This parameter can be one of the following values: + * @param __INTERRUPT__: specifies the interrupt source to enable or disable. + * This parameter can be one of the following values: * @arg SPI_IT_TXE: Tx buffer empty interrupt enable * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable * @arg SPI_IT_ERR: Error interrupt enable @@ -425,10 +414,10 @@ typedef struct __SPI_HandleTypeDef #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__)) #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__))) -/** @brief Checks if the specified SPI interrupt source is enabled or disabled. - * @param __HANDLE__ : specifies the SPI Handle. +/** @brief Check whether the specified SPI interrupt source is enabled or not. + * @param __HANDLE__: specifies the SPI Handle. * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. - * @param __INTERRUPT__ : specifies the SPI interrupt source to check. + * @param __INTERRUPT__: specifies the SPI interrupt source to check. * This parameter can be one of the following values: * @arg SPI_IT_TXE: Tx buffer empty interrupt enable * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable @@ -437,11 +426,11 @@ typedef struct __SPI_HandleTypeDef */ #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) -/** @brief Checks whether the specified SPI flag is set or not. - * @param __HANDLE__ : specifies the SPI Handle. +/** @brief Check whether the specified SPI flag is set or not. + * @param __HANDLE__: specifies the SPI Handle. * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. - * @param __FLAG__ : specifies the flag to check. - * This parameter can be one of the following values: + * @param __FLAG__: specifies the flag to check. + * This parameter can be one of the following values: * @arg SPI_FLAG_RXNE: Receive buffer not empty flag * @arg SPI_FLAG_TXE: Transmit buffer empty flag * @arg SPI_FLAG_CRCERR: CRC error flag @@ -455,63 +444,60 @@ typedef struct __SPI_HandleTypeDef */ #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) -/** @brief Clears the SPI CRCERR pending flag. - * @param __HANDLE__ : specifies the SPI Handle. +/** @brief Clear the SPI CRCERR pending flag. + * @param __HANDLE__: specifies the SPI Handle. * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. * @retval None */ #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR)) -/** @brief Clears the SPI MODF pending flag. - * @param __HANDLE__ : specifies the SPI Handle. +/** @brief Clear the SPI MODF pending flag. + * @param __HANDLE__: specifies the SPI Handle. * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. - * * @retval None */ -#define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \ - do{ \ - __IO uint32_t tmpreg; \ - tmpreg = (__HANDLE__)->Instance->SR; \ - (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE); \ - UNUSED(tmpreg); \ - } while(0) +#define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \ + do{ \ + __IO uint32_t tmpreg_modf = 0x00U; \ + tmpreg_modf = (__HANDLE__)->Instance->SR; \ + (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE); \ + UNUSED(tmpreg_modf); \ + } while(0) -/** @brief Clears the SPI OVR pending flag. - * @param __HANDLE__ : specifies the SPI Handle. +/** @brief Clear the SPI OVR pending flag. + * @param __HANDLE__: specifies the SPI Handle. * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. - * * @retval None */ -#define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \ - do{ \ - __IO uint32_t tmpreg; \ - tmpreg = (__HANDLE__)->Instance->DR; \ - tmpreg = (__HANDLE__)->Instance->SR; \ - UNUSED(tmpreg); \ - } while(0) +#define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \ + do{ \ + __IO uint32_t tmpreg_ovr = 0x00U; \ + tmpreg_ovr = (__HANDLE__)->Instance->DR; \ + tmpreg_ovr = (__HANDLE__)->Instance->SR; \ + UNUSED(tmpreg_ovr); \ + } while(0) -/** @brief Clears the SPI FRE pending flag. - * @param __HANDLE__ : specifies the SPI Handle. +/** @brief Clear the SPI FRE pending flag. + * @param __HANDLE__: specifies the SPI Handle. * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. - * * @retval None */ -#define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \ - do{ \ - __IO uint32_t tmpreg; \ - tmpreg = (__HANDLE__)->Instance->SR; \ - UNUSED(tmpreg); \ - } while(0) +#define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \ + do{ \ + __IO uint32_t tmpreg_fre = 0x00U; \ + tmpreg_fre = (__HANDLE__)->Instance->SR; \ + UNUSED(tmpreg_fre); \ + }while(0) -/** @brief Enables the SPI. - * @param __HANDLE__ : specifies the SPI Handle. +/** @brief Enable the SPI peripheral. + * @param __HANDLE__: specifies the SPI Handle. * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. * @retval None */ #define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_SPE) -/** @brief Disables the SPI. - * @param __HANDLE__ : specifies the SPI Handle. +/** @brief Disable the SPI peripheral. + * @param __HANDLE__: specifies the SPI Handle. * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. * @retval None */ @@ -521,27 +507,27 @@ typedef struct __SPI_HandleTypeDef * @} */ -/* Private macros --------------------------------------------------------*/ -/** @defgroup SPI_Private_Macros SPI Private Macros +/* Private macros ------------------------------------------------------------*/ +/** @defgroup SPI_Private_Macros SPI Private Macros * @{ */ -/** @brief Sets the SPI transmit-only mode. - * @param __HANDLE__ : specifies the SPI Handle. +/** @brief Set the SPI transmit-only mode. + * @param __HANDLE__: specifies the SPI Handle. * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. * @retval None */ #define SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE) -/** @brief Sets the SPI receive-only mode. - * @param __HANDLE__ : specifies the SPI Handle. +/** @brief Set the SPI receive-only mode. + * @param __HANDLE__: specifies the SPI Handle. * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. * @retval None */ #define SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_BIDIOE)) -/** @brief Resets the CRC calculation of the SPI. - * @param __HANDLE__ : specifies the SPI Handle. +/** @brief Reset the CRC calculation of the SPI. + * @param __HANDLE__: specifies the SPI Handle. * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral. * @retval None */ @@ -551,14 +537,14 @@ typedef struct __SPI_HandleTypeDef #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \ ((MODE) == SPI_MODE_MASTER)) -#define IS_SPI_DIRECTION(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \ - ((MODE) == SPI_DIRECTION_2LINES_RXONLY) ||\ +#define IS_SPI_DIRECTION(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \ + ((MODE) == SPI_DIRECTION_2LINES_RXONLY) || \ ((MODE) == SPI_DIRECTION_1LINE)) #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES) -#define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES)|| \ - ((MODE) == SPI_DIRECTION_1LINE)) +#define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \ + ((MODE) == SPI_DIRECTION_1LINE)) #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \ ((DATASIZE) == SPI_DATASIZE_15BIT) || \ @@ -580,19 +566,19 @@ typedef struct __SPI_HandleTypeDef #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \ ((CPHA) == SPI_PHASE_2EDGE)) -#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || \ +#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || \ ((NSS) == SPI_NSS_HARD_INPUT) || \ ((NSS) == SPI_NSS_HARD_OUTPUT)) #define IS_SPI_NSSP(NSSP) (((NSSP) == SPI_NSS_PULSE_ENABLE) || \ ((NSSP) == SPI_NSS_PULSE_DISABLE)) -#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \ - ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \ - ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \ - ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \ - ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \ - ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \ +#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \ + ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \ + ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \ + ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \ + ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \ + ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \ ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \ ((PRESCALER) == SPI_BAUDRATEPRESCALER_256)) @@ -609,25 +595,23 @@ typedef struct __SPI_HandleTypeDef ((LENGTH) == SPI_CRC_LENGTH_8BIT) || \ ((LENGTH) == SPI_CRC_LENGTH_16BIT)) -#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x1) && ((POLYNOMIAL) <= 0xFFFF)) - +#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x1) && ((POLYNOMIAL) <= 0xFFFFU) && (((POLYNOMIAL)&0x1U) != 0)) /** * @} */ /* Exported functions --------------------------------------------------------*/ -/** @addtogroup SPI_Exported_Functions SPI Exported Functions +/** @addtogroup SPI_Exported_Functions * @{ */ /** @addtogroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions * @{ */ - -/* Initialization and de-initialization functions ****************************/ +/* Initialization/de-initialization functions ********************************/ HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi); -HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi); +HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi); void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi); void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi); /** @@ -637,20 +621,25 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi); /** @addtogroup SPI_Exported_Functions_Group2 IO operation functions * @{ */ - -/* IO operation functions *****************************************************/ +/* I/O operation functions ***************************************************/ HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); +HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, + uint32_t Timeout); HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); +HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, + uint16_t Size); HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); +HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, + uint16_t Size); HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi); HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi); HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi); +/* Transfer Abort functions */ +HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi); +HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi); void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi); void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi); @@ -660,6 +649,7 @@ void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi); void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi); void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi); void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi); +void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi); /** * @} */ @@ -693,4 +683,7 @@ uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi); #endif /* __STM32F7xx_HAL_SPI_H */ +/** + * @} + */ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |