diff options
Diffstat (limited to 'stmhal/hal/f7/inc/stm32f7xx_hal_i2s.h')
| -rw-r--r-- | stmhal/hal/f7/inc/stm32f7xx_hal_i2s.h | 90 |
1 files changed, 45 insertions, 45 deletions
diff --git a/stmhal/hal/f7/inc/stm32f7xx_hal_i2s.h b/stmhal/hal/f7/inc/stm32f7xx_hal_i2s.h index d2ae5ce045..af492784d4 100644 --- a/stmhal/hal/f7/inc/stm32f7xx_hal_i2s.h +++ b/stmhal/hal/f7/inc/stm32f7xx_hal_i2s.h @@ -2,13 +2,13 @@ ****************************************************************************** * @file stm32f7xx_hal_i2s.h * @author MCD Application Team - * @version V1.0.1 - * @date 25-June-2015 + * @version V1.1.2 + * @date 23-September-2016 * @brief Header file of I2S HAL module. ****************************************************************************** * @attention * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> + * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> * * Redistribution and use in source and binary forms, with or without modification, * are permitted provided that the following conditions are met: @@ -91,14 +91,14 @@ typedef struct */ typedef enum { - HAL_I2S_STATE_RESET = 0x00, /*!< I2S not yet initialized or disabled */ - HAL_I2S_STATE_READY = 0x01, /*!< I2S initialized and ready for use */ - HAL_I2S_STATE_BUSY = 0x02, /*!< I2S internal process is ongoing */ - HAL_I2S_STATE_BUSY_TX = 0x03, /*!< Data Transmission process is ongoing */ - HAL_I2S_STATE_BUSY_RX = 0x04, /*!< Data Reception process is ongoing */ - HAL_I2S_STATE_BUSY_TX_RX = 0x05, /*!< Data Transmission and Reception process is ongoing */ - HAL_I2S_STATE_TIMEOUT = 0x06, /*!< I2S timeout state */ - HAL_I2S_STATE_ERROR = 0x07 /*!< I2S error state */ + HAL_I2S_STATE_RESET = 0x00U, /*!< I2S not yet initialized or disabled */ + HAL_I2S_STATE_READY = 0x01U, /*!< I2S initialized and ready for use */ + HAL_I2S_STATE_BUSY = 0x02U, /*!< I2S internal process is ongoing */ + HAL_I2S_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */ + HAL_I2S_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */ + HAL_I2S_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */ + HAL_I2S_STATE_TIMEOUT = 0x06U, /*!< I2S timeout state */ + HAL_I2S_STATE_ERROR = 0x07U /*!< I2S error state */ }HAL_I2S_StateTypeDef; @@ -152,12 +152,12 @@ typedef struct *@brief I2S Error Code * @{ */ -#define HAL_I2S_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ -#define HAL_I2S_ERROR_TIMEOUT ((uint32_t)0x00000001) /*!< Timeout error */ -#define HAL_I2S_ERROR_OVR ((uint32_t)0x00000002) /*!< OVR error */ -#define HAL_I2S_ERROR_UDR ((uint32_t)0x00000004) /*!< UDR error */ -#define HAL_I2S_ERROR_DMA ((uint32_t)0x00000008) /*!< DMA transfer error */ -#define HAL_I2S_ERROR_UNKNOW ((uint32_t)0x00000010) /*!< Unknow Error error */ +#define HAL_I2S_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ +#define HAL_I2S_ERROR_TIMEOUT ((uint32_t)0x00000001U) /*!< Timeout error */ +#define HAL_I2S_ERROR_OVR ((uint32_t)0x00000002U) /*!< OVR error */ +#define HAL_I2S_ERROR_UDR ((uint32_t)0x00000004U) /*!< UDR error */ +#define HAL_I2S_ERROR_DMA ((uint32_t)0x00000008U) /*!< DMA transfer error */ +#define HAL_I2S_ERROR_UNKNOW ((uint32_t)0x00000010U) /*!< Unknow Error error */ /** * @} @@ -165,8 +165,8 @@ typedef struct /** @defgroup I2S_Clock_Source I2S Clock Source * @{ */ -#define I2S_CLOCK_EXTERNAL ((uint32_t)0x00000001) -#define I2S_CLOCK_SYSCLK ((uint32_t)0x00000002) +#define I2S_CLOCK_EXTERNAL ((uint32_t)0x00000001U) +#define I2S_CLOCK_PLL ((uint32_t)0x00000002U) /** * @} */ @@ -174,10 +174,10 @@ typedef struct /** @defgroup I2S_Mode I2S Mode * @{ */ -#define I2S_MODE_SLAVE_TX ((uint32_t)0x00000000) -#define I2S_MODE_SLAVE_RX ((uint32_t)0x00000100) -#define I2S_MODE_MASTER_TX ((uint32_t)0x00000200) -#define I2S_MODE_MASTER_RX ((uint32_t)0x00000300) +#define I2S_MODE_SLAVE_TX ((uint32_t)0x00000000U) +#define I2S_MODE_SLAVE_RX ((uint32_t)0x00000100U) +#define I2S_MODE_MASTER_TX ((uint32_t)0x00000200U) +#define I2S_MODE_MASTER_RX ((uint32_t)0x00000300U) /** * @} */ @@ -185,11 +185,11 @@ typedef struct /** @defgroup I2S_Standard I2S Standard * @{ */ -#define I2S_STANDARD_PHILIPS ((uint32_t)0x00000000) -#define I2S_STANDARD_MSB ((uint32_t)0x00000010) -#define I2S_STANDARD_LSB ((uint32_t)0x00000020) -#define I2S_STANDARD_PCM_SHORT ((uint32_t)0x00000030) -#define I2S_STANDARD_PCM_LONG ((uint32_t)0x000000B0) +#define I2S_STANDARD_PHILIPS ((uint32_t)0x00000000U) +#define I2S_STANDARD_MSB ((uint32_t)0x00000010U) +#define I2S_STANDARD_LSB ((uint32_t)0x00000020U) +#define I2S_STANDARD_PCM_SHORT ((uint32_t)0x00000030U) +#define I2S_STANDARD_PCM_LONG ((uint32_t)0x000000B0U) /** * @} */ @@ -197,10 +197,10 @@ typedef struct /** @defgroup I2S_Data_Format I2S Data Format * @{ */ -#define I2S_DATAFORMAT_16B ((uint32_t)0x00000000) -#define I2S_DATAFORMAT_16B_EXTENDED ((uint32_t)0x00000001) -#define I2S_DATAFORMAT_24B ((uint32_t)0x00000003) -#define I2S_DATAFORMAT_32B ((uint32_t)0x00000005) +#define I2S_DATAFORMAT_16B ((uint32_t)0x00000000U) +#define I2S_DATAFORMAT_16B_EXTENDED ((uint32_t)0x00000001U) +#define I2S_DATAFORMAT_24B ((uint32_t)0x00000003U) +#define I2S_DATAFORMAT_32B ((uint32_t)0x00000005U) /** * @} */ @@ -209,7 +209,7 @@ typedef struct * @{ */ #define I2S_MCLKOUTPUT_ENABLE ((uint32_t)SPI_I2SPR_MCKOE) -#define I2S_MCLKOUTPUT_DISABLE ((uint32_t)0x00000000) +#define I2S_MCLKOUTPUT_DISABLE ((uint32_t)0x00000000U) /** * @} */ @@ -217,16 +217,16 @@ typedef struct /** @defgroup I2S_Audio_Frequency I2S Audio Frequency * @{ */ -#define I2S_AUDIOFREQ_192K ((uint32_t)192000) -#define I2S_AUDIOFREQ_96K ((uint32_t)96000) -#define I2S_AUDIOFREQ_48K ((uint32_t)48000) -#define I2S_AUDIOFREQ_44K ((uint32_t)44100) -#define I2S_AUDIOFREQ_32K ((uint32_t)32000) -#define I2S_AUDIOFREQ_22K ((uint32_t)22050) -#define I2S_AUDIOFREQ_16K ((uint32_t)16000) -#define I2S_AUDIOFREQ_11K ((uint32_t)11025) -#define I2S_AUDIOFREQ_8K ((uint32_t)8000) -#define I2S_AUDIOFREQ_DEFAULT ((uint32_t)2) +#define I2S_AUDIOFREQ_192K ((uint32_t)192000U) +#define I2S_AUDIOFREQ_96K ((uint32_t)96000U) +#define I2S_AUDIOFREQ_48K ((uint32_t)48000U) +#define I2S_AUDIOFREQ_44K ((uint32_t)44100U) +#define I2S_AUDIOFREQ_32K ((uint32_t)32000U) +#define I2S_AUDIOFREQ_22K ((uint32_t)22050U) +#define I2S_AUDIOFREQ_16K ((uint32_t)16000U) +#define I2S_AUDIOFREQ_11K ((uint32_t)11025U) +#define I2S_AUDIOFREQ_8K ((uint32_t)8000U) +#define I2S_AUDIOFREQ_DEFAULT ((uint32_t)2U) /** * @} */ @@ -235,7 +235,7 @@ typedef struct /** @defgroup I2S_Clock_Polarity I2S Clock Polarity * @{ */ -#define I2S_CPOL_LOW ((uint32_t)0x00000000) +#define I2S_CPOL_LOW ((uint32_t)0x00000000U) #define I2S_CPOL_HIGH ((uint32_t)SPI_I2SCFGR_CKPOL) /** * @} @@ -434,7 +434,7 @@ uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); * @{ */ #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) || \ - ((CLOCK) == I2S_CLOCK_SYSCLK)) + ((CLOCK) == I2S_CLOCK_PLL)) #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \ ((MODE) == I2S_MODE_SLAVE_RX) || \ |