diff options
Diffstat (limited to 'ports/stm32/powerctrl.h')
-rw-r--r-- | ports/stm32/powerctrl.h | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/ports/stm32/powerctrl.h b/ports/stm32/powerctrl.h index 5b92405611..724ab58366 100644 --- a/ports/stm32/powerctrl.h +++ b/ports/stm32/powerctrl.h @@ -34,19 +34,25 @@ void stm32_system_init(void); #else static inline void stm32_system_init(void) { SystemInit(); + + #if defined(STM32N6) + // The ROM bootloader uses PLL1 to set the CPU to 400MHz, so update + // the value of SystemCoreClock to reflect the hardware state. + SystemCoreClockUpdate(); + #endif } #endif void SystemClock_Config(void); -NORETURN void powerctrl_mcu_reset(void); -NORETURN void powerctrl_enter_bootloader(uint32_t r0, uint32_t bl_addr); +MP_NORETURN void powerctrl_mcu_reset(void); +MP_NORETURN void powerctrl_enter_bootloader(uint32_t r0, uint32_t bl_addr); void powerctrl_check_enter_bootloader(void); void powerctrl_config_systick(void); int powerctrl_rcc_clock_config_pll(RCC_ClkInitTypeDef *rcc_init, uint32_t sysclk_mhz, bool need_pllsai); int powerctrl_set_sysclk(uint32_t sysclk, uint32_t ahb, uint32_t apb1, uint32_t apb2); void powerctrl_enter_stop_mode(void); -NORETURN void powerctrl_enter_standby_mode(void); +MP_NORETURN void powerctrl_enter_standby_mode(void); #endif // MICROPY_INCLUDED_STM32_POWERCTRL_H |