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Diffstat (limited to 'ports/stm32/mpu.h')
-rw-r--r--ports/stm32/mpu.h20
1 files changed, 16 insertions, 4 deletions
diff --git a/ports/stm32/mpu.h b/ports/stm32/mpu.h
index 5756cb0560..8713fe8370 100644
--- a/ports/stm32/mpu.h
+++ b/ports/stm32/mpu.h
@@ -137,18 +137,26 @@ static inline void mpu_config_end(uint32_t irq_state) {
enable_irq(irq_state);
}
-#elif defined(STM32H5)
+#elif defined(STM32H5) || defined(STM32N6)
#define MPU_REGION_SIG (MPU_REGION_NUMBER0)
#define MPU_REGION_ETH (MPU_REGION_NUMBER1)
-#define MPU_REGION_LAST_USED (MPU_REGION_NUMBER1)
+#define MPU_REGION_DMA_UNCACHED_1 (MPU_REGION_NUMBER2)
+#define MPU_REGION_DMA_UNCACHED_2 (MPU_REGION_NUMBER3)
+#define MPU_REGION_LAST_USED (MPU_REGION_NUMBER3)
#define ST_DEVICE_SIGNATURE_BASE (0x08fff800)
#define ST_DEVICE_SIGNATURE_LIMIT (0x08ffffff)
// STM32H5 Cortex-M33 MPU works differently from older cores.
// Macro only takes region size in bytes, Attributes are coded in mpu_config_region().
+#define MPU_CONFIG_DISABLE (0)
#define MPU_CONFIG_ETH(size) (size)
+#define MPU_CONFIG_UNCACHED(size) (size)
+
+#if defined(STM32N6)
+#define MPU_REGION_SIZE_32B (32)
+#endif
static inline void mpu_init(void) {
// Configure attribute 0, inner-outer non-cacheable (=0x44).
@@ -180,8 +188,12 @@ static inline uint32_t mpu_config_start(void) {
}
static inline void mpu_config_region(uint32_t region, uint32_t base_addr, uint32_t size) {
- if (region == MPU_REGION_ETH) {
- // Configure region 1 to make DMA memory non-cacheable.
+ if (size == 0) {
+ // Disable MPU for this region.
+ MPU->RNR = region;
+ MPU->RLAR &= ~MPU_RLAR_EN_Msk;
+ } else if (region == MPU_REGION_ETH || region == MPU_REGION_DMA_UNCACHED_1 || region == MPU_REGION_DMA_UNCACHED_2) {
+ // Configure region to make DMA memory non-cacheable.
__DMB();
// Configure attribute 1, inner-outer non-cacheable (=0x44).