diff options
Diffstat (limited to 'ports/stm32/mboot/main.c')
-rw-r--r-- | ports/stm32/mboot/main.c | 37 |
1 files changed, 34 insertions, 3 deletions
diff --git a/ports/stm32/mboot/main.c b/ports/stm32/mboot/main.c index ff44dac630..2be8793351 100644 --- a/ports/stm32/mboot/main.c +++ b/ports/stm32/mboot/main.c @@ -41,6 +41,7 @@ #include "sdcard.h" #include "dfu.h" #include "pack.h" +#include "xspi.h" // Whether the bootloader will leave via reset, or direct jump to the application. #ifndef MBOOT_LEAVE_BOOTLOADER_VIA_RESET @@ -373,7 +374,7 @@ void SystemClock_Config(void) { #elif defined(STM32G0) #define AHBxENR IOPENR #define AHBxENR_GPIOAEN_Pos RCC_IOPENR_GPIOAEN_Pos -#elif defined(STM32H7) +#elif defined(STM32H7) || defined(STM32N6) #define AHBxENR AHB4ENR #define AHBxENR_GPIOAEN_Pos RCC_AHB4ENR_GPIOAEN_Pos #elif defined(STM32H5) || defined(STM32WB) @@ -424,6 +425,10 @@ void mp_hal_pin_config_speed(uint32_t port_pin, uint32_t speed) { #define MBOOT_SPIFLASH2_LAYOUT "" #endif +#if defined(STM32N6) +#define FLASH_LAYOUT_STR "@Internal Flash " MBOOT_SPIFLASH_LAYOUT MBOOT_SPIFLASH2_LAYOUT +#else + #if defined(STM32F4) \ || defined(STM32F722xx) \ || defined(STM32F723xx) \ @@ -584,12 +589,18 @@ static int mboot_flash_write(uint32_t addr, const uint8_t *src8, size_t len) { return 0; } +#endif + /******************************************************************************/ // Writable address space interface static int do_mass_erase(void) { + #if defined(STM32N6) + return -1; + #else // TODO spiflash erase ? return mboot_flash_mass_erase(); + #endif } #if defined(MBOOT_SPIFLASH_ADDR) || defined(MBOOT_SPIFLASH2_ADDR) @@ -625,7 +636,12 @@ int hw_page_erase(uint32_t addr, uint32_t *next_addr) { } else #endif { + #if defined(STM32N6) + dfu_context.status = DFU_STATUS_ERROR_ADDRESS; + dfu_context.error = MBOOT_ERROR_STR_INVALID_ADDRESS_IDX; + #else ret = mboot_flash_page_erase(addr, next_addr); + #endif } mboot_state_change(MBOOT_STATE_ERASE_END, ret); @@ -678,9 +694,12 @@ int hw_write(uint32_t addr, const uint8_t *src8, size_t len) { ret = mp_spiflash_write(MBOOT_SPIFLASH2_SPIFLASH, addr - MBOOT_SPIFLASH2_ADDR, len, src8); } else #endif + #if !defined(STM32N6) if (flash_is_valid_addr(addr)) { ret = mboot_flash_write(addr, src8, len); - } else { + } else + #endif + { dfu_context.status = DFU_STATUS_ERROR_ADDRESS; dfu_context.error = MBOOT_ERROR_STR_INVALID_ADDRESS_IDX; } @@ -1509,7 +1528,7 @@ void stm32_main(uint32_t initial_r0) { // Make sure IRQ vector table points to flash where this bootloader lives. SCB->VTOR = MBOOT_VTOR; - #if __CORTEX_M != 33 + #if __CORTEX_M != 33 && __CORTEX_M != 55 // Enable 8-byte stack alignment for IRQ handlers, in accord with EABI SCB->CCR |= SCB_CCR_STKALIGN_Msk; #endif @@ -1539,6 +1558,12 @@ void stm32_main(uint32_t initial_r0) { SCB_EnableDCache(); #endif + #if defined(STM32N6) + LL_PWR_EnableBkUpAccess(); + initial_r0 = TAMP_S->BKP31R; + TAMP_S->BKP31R = 0; + #endif + MBOOT_BOARD_EARLY_INIT(&initial_r0); #ifdef MBOOT_BOOTPIN_PIN @@ -1748,6 +1773,12 @@ void USB_DRD_FS_IRQHandler(void) { HAL_PCD_IRQHandler(&pcd_fs_handle); } +#elif defined(STM32N6) + +void USB1_OTG_HS_IRQHandler(void) { + HAL_PCD_IRQHandler(&pcd_hs_handle); +} + #elif defined(STM32WB) void USB_LP_IRQHandler(void) { |