diff options
Diffstat (limited to 'ports/stm32/boards/pllvalues.py')
| -rw-r--r-- | ports/stm32/boards/pllvalues.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/ports/stm32/boards/pllvalues.py b/ports/stm32/boards/pllvalues.py index d8856bfecd..ae042d999c 100644 --- a/ports/stm32/boards/pllvalues.py +++ b/ports/stm32/boards/pllvalues.py @@ -293,7 +293,7 @@ def main(): break # Relax constraint on PLLQ being 48MHz on MCUs which have separate PLLs for 48MHz - relax_pll48 = mcu_series.startswith(("stm32f413", "stm32f7", "stm32h5", "stm32h7")) + relax_pll48 = mcu_series.startswith(("stm32f413", "stm32f7", "stm32h5", "stm32h7", "stm32n6")) hse_valid_plls = compute_pll_table(hse, relax_pll48) if hsi is not None: |