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-rw-r--r--ports/stm32/boards/NUCLEO_H723ZG/board.json15
-rw-r--r--ports/stm32/boards/NUCLEO_H723ZG/board_init.c7
-rw-r--r--ports/stm32/boards/NUCLEO_H723ZG/manifest.py2
-rw-r--r--ports/stm32/boards/NUCLEO_H723ZG/mpconfigboard.h116
-rw-r--r--ports/stm32/boards/NUCLEO_H723ZG/mpconfigboard.mk25
-rw-r--r--ports/stm32/boards/NUCLEO_H723ZG/pins.csv130
-rw-r--r--ports/stm32/boards/NUCLEO_H723ZG/stm32h7xx_hal_conf.h19
7 files changed, 314 insertions, 0 deletions
diff --git a/ports/stm32/boards/NUCLEO_H723ZG/board.json b/ports/stm32/boards/NUCLEO_H723ZG/board.json
new file mode 100644
index 0000000000..bf7dc0e2fb
--- /dev/null
+++ b/ports/stm32/boards/NUCLEO_H723ZG/board.json
@@ -0,0 +1,15 @@
+{
+ "deploy": [
+ "../deploy.md"
+ ],
+ "docs": "",
+ "features": [],
+ "images": [
+ "nucleo_h723zg.jpg"
+ ],
+ "mcu": "stm32h7",
+ "product": "Nucleo H723ZG",
+ "thumbnail": "",
+ "url": "",
+ "vendor": "ST Microelectronics"
+}
diff --git a/ports/stm32/boards/NUCLEO_H723ZG/board_init.c b/ports/stm32/boards/NUCLEO_H723ZG/board_init.c
new file mode 100644
index 0000000000..96a2896e08
--- /dev/null
+++ b/ports/stm32/boards/NUCLEO_H723ZG/board_init.c
@@ -0,0 +1,7 @@
+#include "py/mphal.h"
+
+void NUCLEO_H723ZG_board_early_init(void) {
+ // Turn off the USB switch.
+ mp_hal_pin_output(pyb_pin_OTG_FS_POWER);
+ mp_hal_pin_low(pyb_pin_OTG_FS_POWER);
+}
diff --git a/ports/stm32/boards/NUCLEO_H723ZG/manifest.py b/ports/stm32/boards/NUCLEO_H723ZG/manifest.py
new file mode 100644
index 0000000000..ebfecd4844
--- /dev/null
+++ b/ports/stm32/boards/NUCLEO_H723ZG/manifest.py
@@ -0,0 +1,2 @@
+include("$(PORT_DIR)/boards/manifest.py")
+require("bundle-networking")
diff --git a/ports/stm32/boards/NUCLEO_H723ZG/mpconfigboard.h b/ports/stm32/boards/NUCLEO_H723ZG/mpconfigboard.h
new file mode 100644
index 0000000000..095b7f4b15
--- /dev/null
+++ b/ports/stm32/boards/NUCLEO_H723ZG/mpconfigboard.h
@@ -0,0 +1,116 @@
+#define MICROPY_HW_BOARD_NAME "NUCLEO_H723ZG"
+#define MICROPY_HW_MCU_NAME "STM32H723ZGT6"
+
+#define MICROPY_HW_ENABLE_RTC (1)
+#define MICROPY_HW_ENABLE_RNG (0) // RNG needs proper configuration
+#define MICROPY_HW_ENABLE_ADC (1)
+#define MICROPY_HW_ENABLE_DAC (1)
+#define MICROPY_HW_ENABLE_USB (1)
+#define MICROPY_HW_ENABLE_SDCARD (1)
+#define MICROPY_HW_HAS_SWITCH (1)
+#define MICROPY_HW_HAS_FLASH (1)
+
+#define MICROPY_BOARD_EARLY_INIT NUCLEO_H723ZG_board_early_init
+
+// There is no external HS crystal, instead it comes from ST-LINK MCO output which is 8MHz.
+// The following gives a 550MHz CPU speed.
+#define MICROPY_HW_CLK_USE_BYPASS (1)
+#define MICROPY_HW_CLK_PLLM (4)
+#define MICROPY_HW_CLK_PLLN (275)
+#define MICROPY_HW_CLK_PLLP (1)
+#define MICROPY_HW_CLK_PLLQ (4)
+#define MICROPY_HW_CLK_PLLR (2)
+#define MICROPY_HW_CLK_PLLVCI (RCC_PLL1VCIRANGE_1)
+#define MICROPY_HW_CLK_PLLVCO (RCC_PLL1VCOWIDE)
+#define MICROPY_HW_CLK_PLLFRAC (0)
+
+// The USB clock is set using PLL3
+#define MICROPY_HW_CLK_PLL3M (4)
+#define MICROPY_HW_CLK_PLL3N (120)
+#define MICROPY_HW_CLK_PLL3P (2)
+#define MICROPY_HW_CLK_PLL3Q (5)
+#define MICROPY_HW_CLK_PLL3R (2)
+#define MICROPY_HW_CLK_PLL3VCI (RCC_PLL3VCIRANGE_1)
+#define MICROPY_HW_CLK_PLL3VCO (RCC_PLL3VCOWIDE)
+#define MICROPY_HW_CLK_PLL3FRAC (0)
+
+// 4 wait states
+#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_4
+
+// The board has an external 32kHz crystal attached
+#define MICROPY_HW_RTC_USE_LSE (1)
+
+// UART config
+#define MICROPY_HW_UART2_TX (pin_D5)
+#define MICROPY_HW_UART2_RX (pin_D6)
+#define MICROPY_HW_UART2_RTS (pin_D4)
+#define MICROPY_HW_UART2_CTS (pin_D3)
+#define MICROPY_HW_UART3_TX (pin_D8)
+#define MICROPY_HW_UART3_RX (pin_D9)
+#define MICROPY_HW_UART5_TX (pin_B6)
+#define MICROPY_HW_UART5_RX (pin_B12)
+#define MICROPY_HW_UART6_TX (pin_C6)
+#define MICROPY_HW_UART6_RX (pin_C7)
+#define MICROPY_HW_UART7_TX (pin_F7)
+#define MICROPY_HW_UART7_RX (pin_F6)
+#define MICROPY_HW_UART8_TX (pin_E1)
+#define MICROPY_HW_UART8_RX (pin_E0)
+
+#define MICROPY_HW_UART_REPL PYB_UART_3
+#define MICROPY_HW_UART_REPL_BAUD 115200
+
+// I2C buses
+#define MICROPY_HW_I2C1_SCL (pin_B8)
+#define MICROPY_HW_I2C1_SDA (pin_B9)
+#define MICROPY_HW_I2C2_SCL (pin_F1)
+#define MICROPY_HW_I2C2_SDA (pin_F0)
+#define MICROPY_HW_I2C4_SCL (pin_F14)
+#define MICROPY_HW_I2C4_SDA (pin_F15)
+
+// SPI buses
+#define MICROPY_HW_SPI3_NSS (pin_A4)
+#define MICROPY_HW_SPI3_SCK (pin_B3)
+#define MICROPY_HW_SPI3_MISO (pin_B4)
+#define MICROPY_HW_SPI3_MOSI (pin_B5)
+
+// USRSW is pulled low. Pressing the button makes the input go high.
+#define MICROPY_HW_USRSW_PIN (pin_C13)
+#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL)
+#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING)
+#define MICROPY_HW_USRSW_PRESSED (1)
+
+// LEDs
+#define MICROPY_HW_LED1 (pin_B0) // green
+#define MICROPY_HW_LED2 (pin_E1) // yellow
+#define MICROPY_HW_LED3 (pin_B14) // red
+#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin))
+#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin))
+
+// USB config
+#define MICROPY_HW_USB_HS (1)
+#define MICROPY_HW_USB_HS_IN_FS (1)
+#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9)
+#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10)
+
+// FDCAN bus
+#define MICROPY_HW_CAN1_NAME "FDCAN1"
+#define MICROPY_HW_CAN1_TX (pin_D1)
+#define MICROPY_HW_CAN1_RX (pin_D0)
+
+// SD card detect switch
+#define MICROPY_HW_SDCARD_DETECT_PIN (pin_G2)
+#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLUP)
+#define MICROPY_HW_SDCARD_DETECT_PRESENT (GPIO_PIN_RESET)
+
+// Ethernet via RMII
+#define MICROPY_HW_ETH_MDC (pin_C1)
+#define MICROPY_HW_ETH_MDIO (pin_A2)
+#define MICROPY_HW_ETH_RMII_REF_CLK (pin_A1)
+#define MICROPY_HW_ETH_RMII_CRS_DV (pin_A7)
+#define MICROPY_HW_ETH_RMII_RXD0 (pin_C4)
+#define MICROPY_HW_ETH_RMII_RXD1 (pin_C5)
+#define MICROPY_HW_ETH_RMII_TX_EN (pin_G11)
+#define MICROPY_HW_ETH_RMII_TXD0 (pin_G13)
+#define MICROPY_HW_ETH_RMII_TXD1 (pin_B13)
+
+void NUCLEO_H723ZG_board_early_init(void);
diff --git a/ports/stm32/boards/NUCLEO_H723ZG/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_H723ZG/mpconfigboard.mk
new file mode 100644
index 0000000000..287b51f6d8
--- /dev/null
+++ b/ports/stm32/boards/NUCLEO_H723ZG/mpconfigboard.mk
@@ -0,0 +1,25 @@
+USE_MBOOT ?= 0
+
+# MCU settings
+MCU_SERIES = h7
+CMSIS_MCU = STM32H723xx
+MICROPY_FLOAT_IMPL = double
+AF_FILE = boards/stm32h723_af.csv
+
+ifeq ($(USE_MBOOT),1)
+# When using Mboot everything goes after the bootloader
+LD_FILES = boards/stm32h723.ld boards/common_bl.ld
+TEXT0_ADDR = 0x08020000
+else
+# When not using Mboot everything goes at the start of flash
+LD_FILES = boards/stm32h723.ld boards/common_basic.ld
+TEXT0_ADDR = 0x08000000
+endif
+
+# MicroPython settings
+MICROPY_PY_LWIP = 1
+MICROPY_PY_USSL = 1
+MICROPY_SSL_MBEDTLS = 1
+MICROPY_VFS_LFS2 = 1
+
+FROZEN_MANIFEST ?= $(BOARD_DIR)/manifest.py
diff --git a/ports/stm32/boards/NUCLEO_H723ZG/pins.csv b/ports/stm32/boards/NUCLEO_H723ZG/pins.csv
new file mode 100644
index 0000000000..450d6e432a
--- /dev/null
+++ b/ports/stm32/boards/NUCLEO_H723ZG/pins.csv
@@ -0,0 +1,130 @@
+A0,PA3
+A1,PC0
+A2,PC3
+A3,PB1
+A4,PC2
+A5,PF10
+A6,PF4
+A7,PF5
+A8,PF6
+D0,PB7
+D1,PB6
+D2,PG14
+D3,PE13
+D4,PE14
+D5,PE11
+D6,PE9
+D7,PG12
+D8,PF3
+D9,PD15
+D10,PD14
+D11,PB5
+D12,PA6
+D13,PA7
+D14,PB9
+D15,PB8
+D16,PC6
+D17,PB15
+D18,PB13
+D19,PB12
+D20,PA15
+D21,PC7
+D22,PB5
+D23,PB3
+D24,PA4
+D25,PB4
+D26,PG6
+D27,PB2
+D28,PD13
+D29,PD12
+D30,PD11
+D31,PE2
+D32,PA0
+D33,PB0
+D34,PE0
+D35,PB11
+D36,PB10
+D37,PE15
+D38,PE6
+D39,PE12
+D40,PE10
+D41,PE7
+D42,PE8
+D43,PC8
+D44,PC9
+D45,PC10
+D46,PC11
+D47,PC12
+D48,PD2
+D49,PG2
+D50,PG3
+D51,PD7
+D52,PD6
+D53,PD5
+D54,PD4
+D55,PD3
+D56,PE2
+D57,PE4
+D58,PE5
+D59,PE6
+D60,PE3
+D61,PF8
+D62,PF7
+D63,PF9
+D64,PG1
+D65,PG0
+D66,PD1
+D67,PD0
+D68,PF0
+D69,PF1
+D70,PF2
+D71,PE9
+D72,PB2
+DAC1,PA4
+DAC2,PA5
+LED1,PB0
+LED2,PE1
+LED3,PB14
+SW,PC13
+I2C1_SDA,PB9
+I2C1_SCL,PB8
+I2C2_SDA,PF0
+I2C2_SCL,PF1
+I2C4_SCL,PF14
+I2C4_SDA,PF15
+SD_D0,PC8
+SD_D1,PC9
+SD_D2,PC10
+SD_D3,PC11
+SD_CMD,PD2
+SD_CK,PC12
+SD_SW,PG2
+OTG_FS_POWER,PD10
+OTG_FS_OVER_CURRENT,PG7
+USB_VBUS,PA9
+USB_ID,PA10
+USB_DM,PA11
+USB_DP,PA12
+UART2_TX,PD5
+UART2_RX,PD6
+UART2_RTS,PD4
+UART2_CTS,PD3
+UART3_TX,PD8
+UART3_RX,PD9
+UART5_TX,PB6
+UART5_RX,PB12
+UART6_TX,PC6
+UART6_RX,PC7
+UART7_TX,PF7
+UART7_RX,PF6
+UART8_TX,PE1
+UART8_RX,PE0
+ETH_MDC,PC1
+ETH_MDIO,PA2
+ETH_RMII_REF_CLK,PA1
+ETH_RMII_CRS_DV,PA7
+ETH_RMII_RXD0,PC4
+ETH_RMII_RXD1,PC5
+ETH_RMII_TX_EN,PG11
+ETH_RMII_TXD0,PG13
+ETH_RMII_TXD1,PB13
diff --git a/ports/stm32/boards/NUCLEO_H723ZG/stm32h7xx_hal_conf.h b/ports/stm32/boards/NUCLEO_H723ZG/stm32h7xx_hal_conf.h
new file mode 100644
index 0000000000..45400cdcd7
--- /dev/null
+++ b/ports/stm32/boards/NUCLEO_H723ZG/stm32h7xx_hal_conf.h
@@ -0,0 +1,19 @@
+/* This file is part of the MicroPython project, http://micropython.org/
+ * The MIT License (MIT)
+ * Copyright (c) 2019 Damien P. George
+ */
+#ifndef MICROPY_INCLUDED_STM32H7XX_HAL_CONF_H
+#define MICROPY_INCLUDED_STM32H7XX_HAL_CONF_H
+
+#include "boards/stm32h7xx_hal_conf_base.h"
+
+// Oscillator values in Hz
+#define HSE_VALUE (8000000)
+#define LSE_VALUE (32768)
+#define EXTERNAL_CLOCK_VALUE (12288000)
+
+// Oscillator timeouts in ms
+#define HSE_STARTUP_TIMEOUT (5000)
+#define LSE_STARTUP_TIMEOUT (5000)
+
+#endif // MICROPY_INCLUDED_STM32H7XX_HAL_CONF_H
generated by cgit v1.2.3 (git 2.39.1) at 2025-05-13 22:54:09 +0000