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| author | Damien George <damien@micropython.org> | 2024-10-21 16:32:24 +1100 |
|---|---|---|
| committer | Damien George <damien@micropython.org> | 2024-10-22 10:17:05 +1100 |
| commit | 97af1001ae07c573bf432b9923dcdf78055a508c (patch) | |
| tree | 55fb7563b75ec1f199957f4b0856033a390b566b /tests/extmod/machine_uart_tx.py | |
| parent | 1b89c503db690967d50699abe0bfa942f6f6b15e (diff) | |
| download | micropython-97af1001ae07c573bf432b9923dcdf78055a508c.tar.gz micropython-97af1001ae07c573bf432b9923dcdf78055a508c.zip | |
rp2/machine_uart: Make it so TX is done only when no longer busy.
Prior to this commit, when flushing a UART on the rp2 port, it returns just
before the last character is sent out the wire.
Fix this by waiting until the BUSY flag is cleared.
This also fixes the behaviour of `UART.txdone()` to return `True` only when
the last byte has gone out.
Updated docs and tests to match. The test now checks that UART TX time is
very close to the expected time (prior, it was just testing that the TX
time was less than the expected time).
Signed-off-by: Damien George <damien@micropython.org>
Diffstat (limited to 'tests/extmod/machine_uart_tx.py')
| -rw-r--r-- | tests/extmod/machine_uart_tx.py | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/tests/extmod/machine_uart_tx.py b/tests/extmod/machine_uart_tx.py index 54c0af2b23..25bb834929 100644 --- a/tests/extmod/machine_uart_tx.py +++ b/tests/extmod/machine_uart_tx.py @@ -14,6 +14,7 @@ if "rp2" in sys.platform: uart_id = 0 tx_pin = "GPIO0" rx_pin = "GPIO1" + timing_margin_us = 180 else: print("SKIP") raise SystemExit @@ -31,4 +32,5 @@ for bits_per_s in (2400, 9600, 115200): # 1(startbit) + 8(bits) + 1(stopbit) + 0(parity) bits_per_char = 10 expect_us = (len(text)) * bits_per_char * 1_000_000 // bits_per_s - print(bits_per_s, duration_us <= expect_us) + delta_us = abs(duration_us - expect_us) + print(bits_per_s, delta_us <= timing_margin_us or delta_us) |