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authorDamien George <damien.p.george@gmail.com>2019-10-16 23:12:06 +1100
committerDamien George <damien.p.george@gmail.com>2019-10-16 23:12:06 +1100
commit4f2c737b0c05cd138f15703d492ad64d39c3fcfd (patch)
tree8435605d97c9ea58758a92dd93773d77c63c75c9 /ports/stm32/qspi.c
parent595438785879552912a1a6832a4f2715f4e82272 (diff)
downloadmicropython-4f2c737b0c05cd138f15703d492ad64d39c3fcfd.tar.gz
micropython-4f2c737b0c05cd138f15703d492ad64d39c3fcfd.zip
stm32/mpu: Save and restore the IRQ state when configuring MPU.
In case IRQs are already disabled during the MPU configuration. Fixes issue #5152.
Diffstat (limited to 'ports/stm32/qspi.c')
-rw-r--r--ports/stm32/qspi.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/ports/stm32/qspi.c b/ports/stm32/qspi.c
index ec744bfb27..30ee2c9ea7 100644
--- a/ports/stm32/qspi.c
+++ b/ports/stm32/qspi.c
@@ -55,9 +55,9 @@
static inline void qspi_mpu_disable_all(void) {
// Configure MPU to disable access to entire QSPI region, to prevent CPU
// speculative execution from accessing this region and modifying QSPI registers.
- mpu_config_start();
+ uint32_t irq_state = mpu_config_start();
mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_DISABLE(0x00, MPU_REGION_SIZE_256MB));
- mpu_config_end();
+ mpu_config_end(irq_state);
}
static inline void qspi_mpu_enable_mapped(void) {
@@ -67,11 +67,11 @@ static inline void qspi_mpu_enable_mapped(void) {
// to everything except the valid address space, using holes in the bottom
// of the regions and nesting them.
// At the moment this is hard-coded to 2MiB of QSPI address space.
- mpu_config_start();
+ uint32_t irq_state = mpu_config_start();
mpu_config_region(MPU_REGION_QSPI1, QSPI_MAP_ADDR, MPU_CONFIG_DISABLE(0x01, MPU_REGION_SIZE_256MB));
mpu_config_region(MPU_REGION_QSPI2, QSPI_MAP_ADDR, MPU_CONFIG_DISABLE(0x0f, MPU_REGION_SIZE_32MB));
mpu_config_region(MPU_REGION_QSPI3, QSPI_MAP_ADDR, MPU_CONFIG_DISABLE(0x01, MPU_REGION_SIZE_16MB));
- mpu_config_end();
+ mpu_config_end(irq_state);
}
void qspi_init(void) {