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authorAlessandro Gatti <a.gatti@frob.it>2024-06-08 11:00:08 +0200
committerDamien George <damien@micropython.org>2024-06-21 15:06:07 +1000
commit8338f663523d675847b8c0b9b92977b76995de8f (patch)
tree7058f782f01fd1a211a18c73456565f4f26f77aa /docs/reference/filesystem.rst
parent5a778ebc378d7a1bc9716177950c9e8ac000bb56 (diff)
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py/asmrv32: Add RISC-V RV32IMC native code emitter.
This adds a native code generation backend for RISC-V RV32I CPUs, currently limited to the I, M, and C instruction sets. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
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