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authorDaniel Campora <daniel@wipy.io>2015-08-11 14:21:50 +0200
committerDaniel Campora <daniel@wipy.io>2015-08-16 20:17:55 +0200
commit34c290b678f6ba3a903754aad16758a007286b46 (patch)
treec3c2f10a3f074d65d5bd78cd255501149df15620 /docs/library/pyb.SPI.rst
parentea5061e409449118ed45ce2956800780631bcf9e (diff)
downloadmicropython-34c290b678f6ba3a903754aad16758a007286b46.tar.gz
micropython-34c290b678f6ba3a903754aad16758a007286b46.zip
cc3200: Rename SPI nss param to cs.
The nss param in the pyboard has a different meaning that doesn't apply to the WiPy.
Diffstat (limited to 'docs/library/pyb.SPI.rst')
-rw-r--r--docs/library/pyb.SPI.rst5
1 files changed, 2 insertions, 3 deletions
diff --git a/docs/library/pyb.SPI.rst b/docs/library/pyb.SPI.rst
index 16aa3e20e1..37fdba921e 100644
--- a/docs/library/pyb.SPI.rst
+++ b/docs/library/pyb.SPI.rst
@@ -25,7 +25,7 @@ there are 3 lines: SCK, MOSI, MISO.
parameters to init the SPI bus::
from pyb import SPI
- spi = SPI(1, SPI.MASTER, baudrate=1000000, polarity=0, phase=0, nss=SPI.ACTIVE_LOW)
+ spi = SPI(1, SPI.MASTER, baudrate=1000000, polarity=0, phase=0, cs_polarity=SPI.ACTIVE_LOW)
Only required parameter is mode, must be SPI.MASTER. Polarity can be 0 or
1, and is the level the idle clock line sits at. Phase can be 0 or 1 to
@@ -115,8 +115,7 @@ Methods
- ``phase`` can be 0 or 1 to sample data on the first or second clock edge
respectively.
- ``bits`` is the width of each transfer, accepted values are 8, 16 and 32.
- - ``nss`` is the polarity of the slave select line. Can be ``SPI.ACTIVE_LOW``
- or ``SPI.ACTIVE_HIGH``.
+ - ``cs_polarity`` can be ``SPI.ACTIVE_LOW`` or ``SPI.ACTIVE_HIGH``.
Note that the SPI clock frequency will not always be the requested baudrate.
Printing the SPI object will show you the computed baudrate and the chosen