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| author | Damien George <damien.p.george@gmail.com> | 2020-01-29 16:49:13 +1100 |
|---|---|---|
| committer | Damien George <damien.p.george@gmail.com> | 2020-01-29 16:49:13 +1100 |
| commit | a542c6d7e0340e5ff5364426131bdbd69a64e746 (patch) | |
| tree | b4f09a20a9692ae6031479517fdd9f2b3d861152 /docs/esp8266/tutorial | |
| parent | c3095b37e96aeb69564f53d30a12242ab42bbd02 (diff) | |
| download | micropython-a542c6d7e0340e5ff5364426131bdbd69a64e746.tar.gz micropython-a542c6d7e0340e5ff5364426131bdbd69a64e746.zip | |
stm32/powerctrl: For F7, allow PLLM!=HSE when setting PLLSAI to 48MHz.
PLLM is shared among all PLL blocks on F7 MCUs, and this calculation to
configure PLLSAI to have 48MHz on the P output previously assumed that PLLM
is equal to HSE (eg PLLM=25 for HSE=25MHz). This commit relaxes this
assumption to allow other values of PLLM.
Diffstat (limited to 'docs/esp8266/tutorial')
0 files changed, 0 insertions, 0 deletions