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| author | Damien George <damien.p.george@gmail.com> | 2018-02-05 15:12:22 +1100 |
|---|---|---|
| committer | Damien George <damien.p.george@gmail.com> | 2018-02-05 15:12:22 +1100 |
| commit | 011d1555cb12d23b68085671d903f22bac331942 (patch) | |
| tree | bd6391c20983292b7de739b0a9906c452ac79b23 /docs/esp8266/tutorial/filesystem.rst | |
| parent | 5a62f0faa62751af94a795428eddab43f7e60518 (diff) | |
| download | micropython-011d1555cb12d23b68085671d903f22bac331942.tar.gz micropython-011d1555cb12d23b68085671d903f22bac331942.zip | |
stm32/rtc: Fix RTC init to use LSI if LSI is already selected on boot.
Upon boot the RTC early-init function should detect if LSE or LSI is
already selected/running and, if so, use it. When the LSI has previously
(in the previous reset cycle) been selected as the clock source the only
way to reliably tell is if the RTCSEL bits of the RCC_BDCR are set to the
correct LSI value. In particular the RCC_CSR bits for LSI control do not
indicate if the LSI is ready even if it is selected.
This patch removes the check on the RCC_CSR bits for the LSI being on and
ready and only uses the check on the RCC_BDCR to see if the LSI should be
used straightaway. This was tested on a PYBLITEv1.0 and with the patch the
LSI persists correctly as the RTC source as long as the backup domain
remains powered.
Diffstat (limited to 'docs/esp8266/tutorial/filesystem.rst')
0 files changed, 0 insertions, 0 deletions