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authorAlessandro Gatti <a.gatti@frob.it>2025-05-22 12:34:12 +0200
committerDamien George <damien@micropython.org>2025-06-10 11:29:02 +1000
commit1f5ba6998bb1895354f5afcd7bb52d83a02733be (patch)
tree71345700615e2d3397e77dc79415c343bdec73fd /docs/esp32/tutorial
parent78ee1bac60a89f13d62395c1f7b6b122e26af98a (diff)
downloadmicropython-1f5ba6998bb1895354f5afcd7bb52d83a02733be.tar.gz
micropython-1f5ba6998bb1895354f5afcd7bb52d83a02733be.zip
py/asmthumb: Extend load/store generators with ARMv7-M opcodes.
This commit lets the Thumb native code generator backend emit ARMv7-M specific opcodes for indexed load/store operations if possible. Now T3 opcode encodings are used if the generator backend is configured to allow emitting ARMv7-M opcodes and if the (unsigned) scaled index fits in 12 bits. Or, in other words, LDR{B,H}.W and STR{B,H}.W opcodes are now emitted if possible. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
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