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author | Damien George <damien@micropython.org> | 2025-04-22 11:50:34 +1000 |
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committer | Damien George <damien@micropython.org> | 2025-05-21 12:53:25 +1000 |
commit | d5db8f04613b6a7e6f3d55dd8d618e8ccdaecdfa (patch) | |
tree | 92328801db84230bbe6d13f9966aea5e7e941b55 /docs/esp32/tutorial/pwm.rst | |
parent | 3d7edbd9ab80182b0a11a5df3860dd12f65597a4 (diff) | |
download | micropython-d5db8f04613b6a7e6f3d55dd8d618e8ccdaecdfa.tar.gz micropython-d5db8f04613b6a7e6f3d55dd8d618e8ccdaecdfa.zip |
nrf: Use correct IRAM address for native code execution on nRF52.
On nRF52, the physical SRAM is mapped to 0x20000000 for data access and
0x00800000 for instruction access. So, while native code is allocated and
written using addresses in the 0x20000000 range, it must execute from the
0x00800000 range.
This commit makes this work correctly on nRF52 MCUs by adjusting the
address.
Signed-off-by: Damien George <damien@micropython.org>
Diffstat (limited to 'docs/esp32/tutorial/pwm.rst')
0 files changed, 0 insertions, 0 deletions