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| author | Paul Grayson <pdg@alum.mit.edu> | 2023-10-11 04:39:15 -0700 |
|---|---|---|
| committer | Damien George <damien@micropython.org> | 2024-09-17 11:18:47 +1000 |
| commit | 0d8388673e8456f6b0e92e6f5941e0e804513204 (patch) | |
| tree | 4547c0b92eeef9a90614f9feceb2f25cb091dfb3 /docs/esp32/tutorial/peripheral_access.rst | |
| parent | 7953089a2515123f0bce49aa65efb4e3d2205d15 (diff) | |
| download | micropython-0d8388673e8456f6b0e92e6f5941e0e804513204.tar.gz micropython-0d8388673e8456f6b0e92e6f5941e0e804513204.zip | |
docs/esp32: Update pin access example with addresses for ESP32-S3.
Signed-off-by: Paul Grayson <pdg@alum.mit.edu>
Signed-off-by: Angus Gratton <angus@redyak.com.au>
Diffstat (limited to 'docs/esp32/tutorial/peripheral_access.rst')
| -rw-r--r-- | docs/esp32/tutorial/peripheral_access.rst | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/docs/esp32/tutorial/peripheral_access.rst b/docs/esp32/tutorial/peripheral_access.rst index ecdec101f7..f7c32c367c 100644 --- a/docs/esp32/tutorial/peripheral_access.rst +++ b/docs/esp32/tutorial/peripheral_access.rst @@ -32,6 +32,18 @@ the prescaler of the MCPWM0 peripheral. mem32[MCPWM0] = 0x55 # change PWM_CLK_PRESCALE print(hex(mem32[MCPWM0])) # read PWM_CLK_CFG_REG +The specific addresses will be different on different ESP32 +models. For example, ESP32-S3 uses these values: + +.. code-block:: python3 + + DR_REG_DPORT_BASE = const(0x600C_0000) + DPORT_PERIP_CLK_EN0_REG = const(DR_REG_DPORT_BASE + 0x0018) + DPORT_PERIP_RST_EN0_REG = const(DR_REG_DPORT_BASE + 0x0020) + DPORT_PWM0_CLK_EN = const(1 << 17) + MCPWM0 = const(0x6001_E000 + 0x0004) + ... + Note that before a peripheral can be used its clock must be enabled and it must be taken out of reset. In the above example the following registers are used for this: |