From 1d1e4e1bd5e95d609460e022ea395cd676b5e009 Mon Sep 17 00:00:00 2001 From: mux Date: Thu, 23 Jan 2014 18:27:29 +0200 Subject: Fix USB CORE PCGCCTL Wrong Address * Fix PCGCCTL bug using address instead of value. * Fix issue #211 --- stm/lib/usb_core.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'stm/lib/usb_core.c') diff --git a/stm/lib/usb_core.c b/stm/lib/usb_core.c index b0cce88046..64dd3e4fc6 100644 --- a/stm/lib/usb_core.c +++ b/stm/lib/usb_core.c @@ -1961,7 +1961,7 @@ void USB_OTG_ActiveRemoteWakeup(USB_OTG_CORE_HANDLE *pdev) if(pdev->cfg.low_power) { /* un-gate USB Core clock */ - power.d32 = USB_OTG_READ_REG32(&pdev->regs.PCGCCTL); // dpgeorge: taking the address here might be wrong... + power.d32 = USB_OTG_READ_REG32(pdev->regs.PCGCCTL); power.b.gatehclk = 0; power.b.stoppclk = 0; USB_OTG_WRITE_REG32(pdev->regs.PCGCCTL, power.d32); @@ -1995,7 +1995,7 @@ void USB_OTG_UngateClock(USB_OTG_CORE_HANDLE *pdev) if(dsts.b.suspsts == 1) { /* un-gate USB Core clock */ - power.d32 = USB_OTG_READ_REG32(&pdev->regs.PCGCCTL); // dpgeorge: taking the address here might be wrong... + power.d32 = USB_OTG_READ_REG32(pdev->regs.PCGCCTL); power.b.gatehclk = 0; power.b.stoppclk = 0; USB_OTG_WRITE_REG32(pdev->regs.PCGCCTL, power.d32); -- cgit v1.2.3