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-rw-r--r--esp8266/Makefile115
-rw-r--r--esp8266/eagle.rom.addr.v6.ld344
-rw-r--r--esp8266/esp8266.ld183
-rw-r--r--esp8266/esp_mphal.c92
-rw-r--r--esp8266/esp_mphal.h43
-rw-r--r--esp8266/etshal.h10
-rw-r--r--esp8266/gccollect.c65
-rw-r--r--esp8266/gccollect.h41
-rw-r--r--esp8266/gchelper.s22
-rw-r--r--esp8266/main.c94
-rw-r--r--esp8266/makeimg.py21
-rw-r--r--esp8266/modpyb.c173
-rw-r--r--esp8266/mpconfigport.h71
-rw-r--r--esp8266/pybstdio.c145
-rw-r--r--esp8266/pybstdio.h30
-rw-r--r--esp8266/qstrdefsport.h41
-rw-r--r--esp8266/uart.c191
-rw-r--r--esp8266/uart.h96
-rw-r--r--esp8266/uart_register.h128
-rw-r--r--esp8266/user_config.h1
20 files changed, 1906 insertions, 0 deletions
diff --git a/esp8266/Makefile b/esp8266/Makefile
new file mode 100644
index 0000000000..6826ce9dd2
--- /dev/null
+++ b/esp8266/Makefile
@@ -0,0 +1,115 @@
+include ../py/mkenv.mk
+
+# qstr definitions (must come before including py.mk)
+QSTR_DEFS = qstrdefsport.h #$(BUILD)/pins_qstr.h
+
+# include py core make definitions
+include ../py/py.mk
+
+ifeq ($(ESP_SDK),)
+$(error ESP_SDK must be set)
+endif
+
+CROSS_COMPILE = xtensa-lx106-elf-
+
+INC = -I.
+INC += -I$(PY_SRC)
+INC += -I../stmhal
+INC += -I$(BUILD)
+INC += -I$(ESP_SDK)/include
+
+CFLAGS_XTENSA = -fsingle-precision-constant -Wdouble-promotion \
+ -D__ets__ -DICACHE_FLASH \
+ -fno-inline-functions \
+ -Wl,-EL -mlongcalls -mtext-section-literals \
+
+CFLAGS = $(INC) -Wall -Wpointer-arith -Werror -ansi -std=gnu99 -nostdlib $(CFLAGS_XTENSA) $(COPT)
+
+LDFLAGS = -nostdlib -T esp8266.ld -Map=$(@:.elf=.map) --cref
+LIBS = -L$(ESP_SDK)/lib -lmain -ljson -llwip -lpp -lnet80211 -lwpa -lphy -lnet80211
+
+LIBGCC_FILE_NAME = $(shell $(CC) $(CFLAGS) -print-libgcc-file-name)
+LIBS += -L $(dir $(LIBGCC_FILE_NAME)) -lgcc
+
+# Debugging/Optimization
+ifeq ($(DEBUG), 1)
+CFLAGS += -g
+COPT = -O0
+else
+CFLAGS += -fdata-sections -ffunction-sections
+COPT += -Os -DNDEBUG
+LDFLAGS += --gc-sections
+endif
+
+SRC_C = \
+ main.c \
+ esp_mphal.c \
+ gccollect.c \
+ pybstdio.c \
+ uart.c \
+ modpyb.c \
+
+STM_SRC_C = $(addprefix stmhal/,\
+ printf.c \
+ string0.c \
+ pyexec.c \
+ readline.c \
+ )
+
+SRC_S = \
+ gchelper.s \
+
+OBJ =
+OBJ += $(PY_O)
+OBJ += $(addprefix $(BUILD)/, $(SRC_C:.c=.o))
+OBJ += $(addprefix $(BUILD)/, $(SRC_S:.s=.o))
+OBJ += $(addprefix $(BUILD)/, $(STM_SRC_C:.c=.o))
+#OBJ += $(BUILD)/pins_$(BOARD).o
+
+all: $(BUILD)/firmware-combined.bin
+
+.PHONY: deploy
+
+deploy: $(BUILD)/firmware-combined.bin
+ $(ECHO) "Writing $< to the board"
+ $(Q)esptool.py --port /dev/ttyACM0 write_flash 0 $<
+ #$(Q)esptool.py --port /dev/ttyACM0 write_flash 0 $(BUILD)/firmware.elf-0x00000.bin
+ #$(Q)esptool.py --port /dev/ttyACM0 write_flash 0x10000 $(BUILD)/firmware.elf-0x10000.bin
+
+$(BUILD)/firmware-combined.bin: $(BUILD)/firmware.elf
+ $(ECHO) "Create $@"
+ $(Q)esptool.py elf2image $^
+ $(Q)$(PYTHON) makeimg.py $(BUILD)/firmware.elf-0x00000.bin $(BUILD)/firmware.elf-0x10000.bin $@
+
+$(BUILD)/firmware.elf: $(OBJ)
+ $(ECHO) "LINK $@"
+ $(Q)$(LD) $(LDFLAGS) -o $@ $(OBJ) $(LIBS)
+ $(Q)$(SIZE) $@
+
+#MAKE_PINS = boards/make-pins.py
+#BOARD_PINS = boards/$(BOARD)/pins.csv
+#AF_FILE = boards/stm32f4xx_af.csv
+#PREFIX_FILE = boards/stm32f4xx_prefix.c
+#GEN_PINS_SRC = $(BUILD)/pins_$(BOARD).c
+#GEN_PINS_HDR = $(HEADER_BUILD)/pins.h
+#GEN_PINS_QSTR = $(BUILD)/pins_qstr.h
+#GEN_PINS_AF_CONST = $(HEADER_BUILD)/pins_af_const.h
+#GEN_PINS_AF_PY = $(BUILD)/pins_af.py
+
+# Making OBJ use an order-only depenedency on the generated pins.h file
+# has the side effect of making the pins.h file before we actually compile
+# any of the objects. The normal dependency generation will deal with the
+# case when pins.h is modified. But when it doesn't exist, we don't know
+# which source files might need it.
+#$(OBJ): | $(HEADER_BUILD)/pins.h
+
+# Use a pattern rule here so that make will only call make-pins.py once to make
+# both pins_$(BOARD).c and pins.h
+#$(BUILD)/%_$(BOARD).c $(HEADER_BUILD)/%.h $(HEADER_BUILD)/%_af_const.h $(BUILD)/%_qstr.h: boards/$(BOARD)/%.csv $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
+# $(ECHO) "Create $@"
+# $(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --qstr $(GEN_PINS_QSTR) --af-const $(GEN_PINS_AF_CONST) --af-py $(GEN_PINS_AF_PY) > $(GEN_PINS_SRC)
+#
+#$(BUILD)/pins_$(BOARD).o: $(BUILD)/pins_$(BOARD).c
+# $(call compile_c)
+
+include ../py/mkrules.mk
diff --git a/esp8266/eagle.rom.addr.v6.ld b/esp8266/eagle.rom.addr.v6.ld
new file mode 100644
index 0000000000..c5c1b65223
--- /dev/null
+++ b/esp8266/eagle.rom.addr.v6.ld
@@ -0,0 +1,344 @@
+PROVIDE ( Cache_Read_Disable = 0x400047f0 );
+PROVIDE ( Cache_Read_Enable = 0x40004678 );
+PROVIDE ( FilePacketSendReqMsgProc = 0x400035a0 );
+PROVIDE ( FlashDwnLdParamCfgMsgProc = 0x4000368c );
+PROVIDE ( FlashDwnLdStartMsgProc = 0x40003538 );
+PROVIDE ( FlashDwnLdStopReqMsgProc = 0x40003658 );
+PROVIDE ( GetUartDevice = 0x40003f4c );
+PROVIDE ( MD5Final = 0x40009900 );
+PROVIDE ( MD5Init = 0x40009818 );
+PROVIDE ( MD5Update = 0x40009834 );
+PROVIDE ( MemDwnLdStartMsgProc = 0x400036c4 );
+PROVIDE ( MemDwnLdStopReqMsgProc = 0x4000377c );
+PROVIDE ( MemPacketSendReqMsgProc = 0x400036f0 );
+PROVIDE ( RcvMsg = 0x40003eac );
+PROVIDE ( SHA1Final = 0x4000b648 );
+PROVIDE ( SHA1Init = 0x4000b584 );
+PROVIDE ( SHA1Transform = 0x4000a364 );
+PROVIDE ( SHA1Update = 0x4000b5a8 );
+PROVIDE ( Wait_SPI_Idle = 0x4000448c );
+PROVIDE ( SPIEraseArea = 0x40004b44 );
+PROVIDE ( SPIEraseBlock = 0x400049b4 );
+PROVIDE ( SPIEraseChip = 0x40004984 );
+PROVIDE ( SPIEraseSector = 0x40004a00 );
+PROVIDE ( SPILock = 0x400048a8 );
+PROVIDE ( SPIParamCfg = 0x40004c2c );
+PROVIDE ( SPIRead = 0x40004b1c );
+PROVIDE ( SPIReadModeCnfig = 0x400048ec );
+PROVIDE ( SPIUnlock = 0x40004878 );
+PROVIDE ( SPIWrite = 0x40004a4c );
+PROVIDE ( SelectSpiFunction = 0x40003f58 );
+PROVIDE ( SendMsg = 0x40003cf4 );
+PROVIDE ( UartConnCheck = 0x40003230 );
+PROVIDE ( UartConnectProc = 0x400037a0 );
+PROVIDE ( UartDwnLdProc = 0x40003368 );
+PROVIDE ( UartGetCmdLn = 0x40003ef4 );
+PROVIDE ( UartRegReadProc = 0x4000381c );
+PROVIDE ( UartRegWriteProc = 0x400037ac );
+PROVIDE ( UartRxString = 0x40003c30 );
+PROVIDE ( Uart_Init = 0x40003a14 );
+PROVIDE ( _DebugExceptionVector = 0x40000010 );
+PROVIDE ( _DoubleExceptionVector = 0x40000070 );
+PROVIDE ( _KernelExceptionVector = 0x40000030 );
+PROVIDE ( _NMIExceptionVector = 0x40000020 );
+PROVIDE ( _ResetHandler = 0x400000a4 );
+PROVIDE ( _ResetVector = 0x40000080 );
+PROVIDE ( _UserExceptionVector = 0x40000050 );
+PROVIDE ( __adddf3 = 0x4000c538 );
+PROVIDE ( __addsf3 = 0x4000c180 );
+PROVIDE ( __divdf3 = 0x4000cb94 );
+PROVIDE ( __divdi3 = 0x4000ce60 );
+PROVIDE ( __divsi3 = 0x4000dc88 );
+PROVIDE ( __extendsfdf2 = 0x4000cdfc );
+PROVIDE ( __fixdfsi = 0x4000ccb8 );
+PROVIDE ( __fixunsdfsi = 0x4000cd00 );
+PROVIDE ( __fixunssfsi = 0x4000c4c4 );
+PROVIDE ( __floatsidf = 0x4000e2f0 );
+PROVIDE ( __floatsisf = 0x4000e2ac );
+PROVIDE ( __floatunsidf = 0x4000e2e8 );
+PROVIDE ( __floatunsisf = 0x4000e2a4 );
+PROVIDE ( __muldf3 = 0x4000c8f0 );
+PROVIDE ( __muldi3 = 0x40000650 );
+PROVIDE ( __mulsf3 = 0x4000c3dc );
+PROVIDE ( __subdf3 = 0x4000c688 );
+PROVIDE ( __subsf3 = 0x4000c268 );
+PROVIDE ( __truncdfsf2 = 0x4000cd5c );
+PROVIDE ( __udivdi3 = 0x4000d310 );
+PROVIDE ( __udivsi3 = 0x4000e21c );
+PROVIDE ( __umoddi3 = 0x4000d770 );
+PROVIDE ( __umodsi3 = 0x4000e268 );
+PROVIDE ( __umulsidi3 = 0x4000dcf0 );
+PROVIDE ( _rom_store = 0x4000e388 );
+PROVIDE ( _rom_store_table = 0x4000e328 );
+PROVIDE ( _start = 0x4000042c );
+PROVIDE ( _xtos_alloca_handler = 0x4000dbe0 );
+PROVIDE ( _xtos_c_wrapper_handler = 0x40000598 );
+PROVIDE ( _xtos_cause3_handler = 0x40000590 );
+PROVIDE ( _xtos_ints_off = 0x4000bda4 );
+PROVIDE ( _xtos_ints_on = 0x4000bd84 );
+PROVIDE ( _xtos_l1int_handler = 0x4000048c );
+PROVIDE ( _xtos_p_none = 0x4000dbf8 );
+PROVIDE ( _xtos_restore_intlevel = 0x4000056c );
+PROVIDE ( _xtos_return_from_exc = 0x4000dc54 );
+PROVIDE ( _xtos_set_exception_handler = 0x40000454 );
+PROVIDE ( _xtos_set_interrupt_handler = 0x4000bd70 );
+PROVIDE ( _xtos_set_interrupt_handler_arg = 0x4000bd28 );
+PROVIDE ( _xtos_set_intlevel = 0x4000dbfc );
+PROVIDE ( _xtos_set_min_intlevel = 0x4000dc18 );
+PROVIDE ( _xtos_set_vpri = 0x40000574 );
+PROVIDE ( _xtos_syscall_handler = 0x4000dbe4 );
+PROVIDE ( _xtos_unhandled_exception = 0x4000dc44 );
+PROVIDE ( _xtos_unhandled_interrupt = 0x4000dc3c );
+PROVIDE ( aes_decrypt = 0x400092d4 );
+PROVIDE ( aes_decrypt_deinit = 0x400092e4 );
+PROVIDE ( aes_decrypt_init = 0x40008ea4 );
+PROVIDE ( aes_unwrap = 0x40009410 );
+PROVIDE ( base64_decode = 0x40009648 );
+PROVIDE ( base64_encode = 0x400094fc );
+PROVIDE ( bzero = 0x4000de84 );
+PROVIDE ( cmd_parse = 0x40000814 );
+PROVIDE ( conv_str_decimal = 0x40000b24 );
+PROVIDE ( conv_str_hex = 0x40000cb8 );
+PROVIDE ( convert_para_str = 0x40000a60 );
+PROVIDE ( dtm_get_intr_mask = 0x400026d0 );
+PROVIDE ( dtm_params_init = 0x4000269c );
+PROVIDE ( dtm_set_intr_mask = 0x400026c8 );
+PROVIDE ( dtm_set_params = 0x400026dc );
+PROVIDE ( eprintf = 0x40001d14 );
+PROVIDE ( eprintf_init_buf = 0x40001cb8 );
+PROVIDE ( eprintf_to_host = 0x40001d48 );
+PROVIDE ( est_get_printf_buf_remain_len = 0x40002494 );
+PROVIDE ( est_reset_printf_buf_len = 0x4000249c );
+PROVIDE ( ets_bzero = 0x40002ae8 );
+PROVIDE ( ets_char2xdigit = 0x40002b74 );
+PROVIDE ( ets_delay_us = 0x40002ecc );
+PROVIDE ( ets_enter_sleep = 0x400027b8 );
+PROVIDE ( ets_external_printf = 0x40002578 );
+PROVIDE ( ets_get_cpu_frequency = 0x40002f0c );
+PROVIDE ( ets_getc = 0x40002bcc );
+PROVIDE ( ets_install_external_printf = 0x40002450 );
+PROVIDE ( ets_install_putc1 = 0x4000242c );
+PROVIDE ( ets_install_putc2 = 0x4000248c );
+PROVIDE ( ets_install_uart_printf = 0x40002438 );
+PROVIDE ( ets_intr_lock = 0x40000f74 );
+PROVIDE ( ets_intr_unlock = 0x40000f80 );
+PROVIDE ( ets_isr_attach = 0x40000f88 );
+PROVIDE ( ets_isr_mask = 0x40000f98 );
+PROVIDE ( ets_isr_unmask = 0x40000fa8 );
+PROVIDE ( ets_memcmp = 0x400018d4 );
+PROVIDE ( ets_memcpy = 0x400018b4 );
+PROVIDE ( ets_memmove = 0x400018c4 );
+PROVIDE ( ets_memset = 0x400018a4 );
+PROVIDE ( ets_post = 0x40000e24 );
+PROVIDE ( ets_printf = 0x400024cc );
+PROVIDE ( ets_putc = 0x40002be8 );
+PROVIDE ( ets_rtc_int_register = 0x40002a40 );
+PROVIDE ( ets_run = 0x40000e04 );
+PROVIDE ( ets_set_idle_cb = 0x40000dc0 );
+PROVIDE ( ets_set_user_start = 0x40000fbc );
+PROVIDE ( ets_str2macaddr = 0x40002af8 );
+PROVIDE ( ets_strcmp = 0x40002aa8 );
+PROVIDE ( ets_strcpy = 0x40002a88 );
+PROVIDE ( ets_strlen = 0x40002ac8 );
+PROVIDE ( ets_strncmp = 0x40002ab8 );
+PROVIDE ( ets_strncpy = 0x40002a98 );
+PROVIDE ( ets_strstr = 0x40002ad8 );
+PROVIDE ( ets_task = 0x40000dd0 );
+PROVIDE ( ets_timer_arm = 0x40002cc4 );
+PROVIDE ( ets_timer_disarm = 0x40002d40 );
+PROVIDE ( ets_timer_done = 0x40002d80 );
+PROVIDE ( ets_timer_handler_isr = 0x40002da8 );
+PROVIDE ( ets_timer_init = 0x40002e68 );
+PROVIDE ( ets_timer_setfn = 0x40002c48 );
+PROVIDE ( ets_uart_printf = 0x40002544 );
+PROVIDE ( ets_update_cpu_frequency = 0x40002f04 );
+PROVIDE ( ets_vprintf = 0x40001f00 );
+PROVIDE ( ets_wdt_disable = 0x400030f0 );
+PROVIDE ( ets_wdt_enable = 0x40002fa0 );
+PROVIDE ( ets_wdt_get_mode = 0x40002f34 );
+PROVIDE ( ets_wdt_init = 0x40003170 );
+PROVIDE ( ets_wdt_restore = 0x40003158 );
+PROVIDE ( ets_write_char = 0x40001da0 );
+PROVIDE ( get_first_seg = 0x4000091c );
+PROVIDE ( gpio_init = 0x40004c50 );
+PROVIDE ( gpio_input_get = 0x40004cf0 );
+PROVIDE ( gpio_intr_ack = 0x40004dcc );
+PROVIDE ( gpio_intr_handler_register = 0x40004e28 );
+PROVIDE ( gpio_intr_pending = 0x40004d88 );
+PROVIDE ( gpio_intr_test = 0x40004efc );
+PROVIDE ( gpio_output_set = 0x40004cd0 );
+PROVIDE ( gpio_pin_intr_state_set = 0x40004d90 );
+PROVIDE ( gpio_pin_wakeup_disable = 0x40004ed4 );
+PROVIDE ( gpio_pin_wakeup_enable = 0x40004e90 );
+PROVIDE ( gpio_register_get = 0x40004d5c );
+PROVIDE ( gpio_register_set = 0x40004d04 );
+PROVIDE ( hmac_md5 = 0x4000a2cc );
+PROVIDE ( hmac_md5_vector = 0x4000a160 );
+PROVIDE ( hmac_sha1 = 0x4000ba28 );
+PROVIDE ( hmac_sha1_vector = 0x4000b8b4 );
+PROVIDE ( lldesc_build_chain = 0x40004f40 );
+PROVIDE ( lldesc_num2link = 0x40005050 );
+PROVIDE ( lldesc_set_owner = 0x4000507c );
+PROVIDE ( main = 0x40000fec );
+PROVIDE ( md5_vector = 0x400097ac );
+PROVIDE ( mem_calloc = 0x40001c2c );
+PROVIDE ( mem_free = 0x400019e0 );
+PROVIDE ( mem_init = 0x40001998 );
+PROVIDE ( mem_malloc = 0x40001b40 );
+PROVIDE ( mem_realloc = 0x40001c6c );
+PROVIDE ( mem_trim = 0x40001a14 );
+PROVIDE ( mem_zalloc = 0x40001c58 );
+PROVIDE ( memcmp = 0x4000dea8 );
+PROVIDE ( memcpy = 0x4000df48 );
+PROVIDE ( memmove = 0x4000e04c );
+PROVIDE ( memset = 0x4000e190 );
+PROVIDE ( multofup = 0x400031c0 );
+PROVIDE ( pbkdf2_sha1 = 0x4000b840 );
+PROVIDE ( phy_get_romfuncs = 0x40006b08 );
+PROVIDE ( rand = 0x40000600 );
+PROVIDE ( rc4_skip = 0x4000dd68 );
+PROVIDE ( recv_packet = 0x40003d08 );
+PROVIDE ( remove_head_space = 0x40000a04 );
+PROVIDE ( rijndaelKeySetupDec = 0x40008dd0 );
+PROVIDE ( rijndaelKeySetupEnc = 0x40009300 );
+PROVIDE ( rom_abs_temp = 0x400060c0 );
+PROVIDE ( rom_ana_inf_gating_en = 0x40006b10 );
+PROVIDE ( rom_cal_tos_v50 = 0x40007a28 );
+PROVIDE ( rom_chip_50_set_channel = 0x40006f84 );
+PROVIDE ( rom_chip_v5_disable_cca = 0x400060d0 );
+PROVIDE ( rom_chip_v5_enable_cca = 0x400060ec );
+PROVIDE ( rom_chip_v5_rx_init = 0x4000711c );
+PROVIDE ( rom_chip_v5_sense_backoff = 0x4000610c );
+PROVIDE ( rom_chip_v5_tx_init = 0x4000718c );
+PROVIDE ( rom_dc_iq_est = 0x4000615c );
+PROVIDE ( rom_en_pwdet = 0x400061b8 );
+PROVIDE ( rom_get_bb_atten = 0x40006238 );
+PROVIDE ( rom_get_corr_power = 0x40006260 );
+PROVIDE ( rom_get_fm_sar_dout = 0x400062dc );
+PROVIDE ( rom_get_noisefloor = 0x40006394 );
+PROVIDE ( rom_get_power_db = 0x400063b0 );
+PROVIDE ( rom_i2c_readReg = 0x40007268 );
+PROVIDE ( rom_i2c_readReg_Mask = 0x4000729c );
+PROVIDE ( rom_i2c_writeReg = 0x400072d8 );
+PROVIDE ( rom_i2c_writeReg_Mask = 0x4000730c );
+PROVIDE ( rom_iq_est_disable = 0x40006400 );
+PROVIDE ( rom_iq_est_enable = 0x40006430 );
+PROVIDE ( rom_linear_to_db = 0x40006484 );
+PROVIDE ( rom_mhz2ieee = 0x400065a4 );
+PROVIDE ( rom_pbus_dco___SA2 = 0x40007bf0 );
+PROVIDE ( rom_pbus_debugmode = 0x4000737c );
+PROVIDE ( rom_pbus_enter_debugmode = 0x40007410 );
+PROVIDE ( rom_pbus_exit_debugmode = 0x40007448 );
+PROVIDE ( rom_pbus_force_test = 0x4000747c );
+PROVIDE ( rom_pbus_rd = 0x400074d8 );
+PROVIDE ( rom_pbus_set_rxgain = 0x4000754c );
+PROVIDE ( rom_pbus_set_txgain = 0x40007610 );
+PROVIDE ( rom_pbus_workmode = 0x40007648 );
+PROVIDE ( rom_pbus_xpd_rx_off = 0x40007688 );
+PROVIDE ( rom_pbus_xpd_rx_on = 0x400076cc );
+PROVIDE ( rom_pbus_xpd_tx_off = 0x400076fc );
+PROVIDE ( rom_pbus_xpd_tx_on = 0x40007740 );
+PROVIDE ( rom_pbus_xpd_tx_on__low_gain = 0x400077a0 );
+PROVIDE ( rom_phy_reset_req = 0x40007804 );
+PROVIDE ( rom_restart_cal = 0x4000781c );
+PROVIDE ( rom_rfcal_pwrctrl = 0x40007eb4 );
+PROVIDE ( rom_rfcal_rxiq = 0x4000804c );
+PROVIDE ( rom_rfcal_rxiq_set_reg = 0x40008264 );
+PROVIDE ( rom_rfcal_txcap = 0x40008388 );
+PROVIDE ( rom_rfcal_txiq = 0x40008610 );
+PROVIDE ( rom_rfcal_txiq_cover = 0x400088b8 );
+PROVIDE ( rom_rfcal_txiq_set_reg = 0x40008a70 );
+PROVIDE ( rom_rfpll_reset = 0x40007868 );
+PROVIDE ( rom_rfpll_set_freq = 0x40007968 );
+PROVIDE ( rom_rxiq_cover_mg_mp = 0x40008b6c );
+PROVIDE ( rom_rxiq_get_mis = 0x40006628 );
+PROVIDE ( rom_sar_init = 0x40006738 );
+PROVIDE ( rom_set_ana_inf_tx_scale = 0x4000678c );
+PROVIDE ( rom_set_channel_freq = 0x40006c50 );
+PROVIDE ( rom_set_loopback_gain = 0x400067c8 );
+PROVIDE ( rom_set_noise_floor = 0x40006830 );
+PROVIDE ( rom_set_rxclk_en = 0x40006550 );
+PROVIDE ( rom_set_txbb_atten = 0x40008c6c );
+PROVIDE ( rom_set_txclk_en = 0x4000650c );
+PROVIDE ( rom_set_txiq_cal = 0x40008d34 );
+PROVIDE ( rom_start_noisefloor = 0x40006874 );
+PROVIDE ( rom_start_tx_tone = 0x400068b4 );
+PROVIDE ( rom_stop_tx_tone = 0x4000698c );
+PROVIDE ( rom_tx_mac_disable = 0x40006a98 );
+PROVIDE ( rom_tx_mac_enable = 0x40006ad4 );
+PROVIDE ( rom_txtone_linear_pwr = 0x40006a1c );
+PROVIDE ( rom_write_rfpll_sdm = 0x400078dc );
+PROVIDE ( roundup2 = 0x400031b4 );
+PROVIDE ( rtc_enter_sleep = 0x40002870 );
+PROVIDE ( rtc_get_reset_reason = 0x400025e0 );
+PROVIDE ( rtc_intr_handler = 0x400029ec );
+PROVIDE ( rtc_set_sleep_mode = 0x40002668 );
+PROVIDE ( save_rxbcn_mactime = 0x400027a4 );
+PROVIDE ( save_tsf_us = 0x400027ac );
+PROVIDE ( send_packet = 0x40003c80 );
+PROVIDE ( sha1_prf = 0x4000ba48 );
+PROVIDE ( sha1_vector = 0x4000a2ec );
+PROVIDE ( sip_alloc_to_host_evt = 0x40005180 );
+PROVIDE ( sip_get_ptr = 0x400058a8 );
+PROVIDE ( sip_get_state = 0x40005668 );
+PROVIDE ( sip_init_attach = 0x4000567c );
+PROVIDE ( sip_install_rx_ctrl_cb = 0x4000544c );
+PROVIDE ( sip_install_rx_data_cb = 0x4000545c );
+PROVIDE ( sip_post = 0x400050fc );
+PROVIDE ( sip_post_init = 0x400056c4 );
+PROVIDE ( sip_reclaim_from_host_cmd = 0x4000534c );
+PROVIDE ( sip_reclaim_tx_data_pkt = 0x400052c0 );
+PROVIDE ( sip_send = 0x40005808 );
+PROVIDE ( sip_to_host_chain_append = 0x40005864 );
+PROVIDE ( sip_to_host_evt_send_done = 0x40005234 );
+PROVIDE ( slc_add_credits = 0x400060ac );
+PROVIDE ( slc_enable = 0x40005d90 );
+PROVIDE ( slc_from_host_chain_fetch = 0x40005f24 );
+PROVIDE ( slc_from_host_chain_recycle = 0x40005e94 );
+PROVIDE ( slc_init_attach = 0x40005c50 );
+PROVIDE ( slc_init_credit = 0x4000608c );
+PROVIDE ( slc_pause_from_host = 0x40006014 );
+PROVIDE ( slc_reattach = 0x40005c1c );
+PROVIDE ( slc_resume_from_host = 0x4000603c );
+PROVIDE ( slc_select_tohost_gpio = 0x40005dc0 );
+PROVIDE ( slc_select_tohost_gpio_mode = 0x40005db8 );
+PROVIDE ( slc_send_to_host_chain = 0x40005de4 );
+PROVIDE ( slc_set_host_io_max_window = 0x40006068 );
+PROVIDE ( slc_to_host_chain_recycle = 0x40005f10 );
+PROVIDE ( software_reset = 0x4000264c );
+PROVIDE ( spi_flash_attach = 0x40004644 );
+PROVIDE ( srand = 0x400005f0 );
+PROVIDE ( strcmp = 0x4000bdc8 );
+PROVIDE ( strcpy = 0x4000bec8 );
+PROVIDE ( strlen = 0x4000bf4c );
+PROVIDE ( strncmp = 0x4000bfa8 );
+PROVIDE ( strncpy = 0x4000c0a0 );
+PROVIDE ( strstr = 0x4000e1e0 );
+PROVIDE ( timer_insert = 0x40002c64 );
+PROVIDE ( uartAttach = 0x4000383c );
+PROVIDE ( uart_baudrate_detect = 0x40003924 );
+PROVIDE ( uart_buff_switch = 0x400038a4 );
+PROVIDE ( uart_div_modify = 0x400039d8 );
+PROVIDE ( uart_rx_intr_handler = 0x40003bbc );
+PROVIDE ( uart_rx_one_char = 0x40003b8c );
+PROVIDE ( uart_rx_one_char_block = 0x40003b64 );
+PROVIDE ( uart_rx_readbuff = 0x40003ec8 );
+PROVIDE ( uart_tx_one_char = 0x40003b30 );
+PROVIDE ( wepkey_128 = 0x4000bc40 );
+PROVIDE ( wepkey_64 = 0x4000bb3c );
+PROVIDE ( xthal_bcopy = 0x40000688 );
+PROVIDE ( xthal_copy123 = 0x4000074c );
+PROVIDE ( xthal_get_ccompare = 0x4000dd4c );
+PROVIDE ( xthal_get_ccount = 0x4000dd38 );
+PROVIDE ( xthal_get_interrupt = 0x4000dd58 );
+PROVIDE ( xthal_get_intread = 0x4000dd58 );
+PROVIDE ( xthal_memcpy = 0x400006c4 );
+PROVIDE ( xthal_set_ccompare = 0x4000dd40 );
+PROVIDE ( xthal_set_intclear = 0x4000dd60 );
+PROVIDE ( xthal_spill_registers_into_stack_nw = 0x4000e320 );
+PROVIDE ( xthal_window_spill = 0x4000e324 );
+PROVIDE ( xthal_window_spill_nw = 0x4000e320 );
+
+PROVIDE ( Te0 = 0x3fffccf0 );
+PROVIDE ( UartDev = 0x3fffde10 );
+PROVIDE ( flashchip = 0x3fffc714);
diff --git a/esp8266/esp8266.ld b/esp8266/esp8266.ld
new file mode 100644
index 0000000000..34171c357f
--- /dev/null
+++ b/esp8266/esp8266.ld
@@ -0,0 +1,183 @@
+/* GNU linker script for ESP8266 */
+
+MEMORY
+{
+ dport0_0_seg : org = 0x3ff00000, len = 0x10
+ dram0_0_seg : org = 0x3ffe8000, len = 0x14000
+ iram1_0_seg : org = 0x40100000, len = 0x8000
+ irom0_0_seg : org = 0x40210000, len = 0x40000
+}
+
+/* define the top of RAM */
+_heap_end = ORIGIN(dram0_0_seg) + LENGTH(dram0_0_seg);
+
+PHDRS
+{
+ dport0_0_phdr PT_LOAD;
+ dram0_0_phdr PT_LOAD;
+ dram0_0_bss_phdr PT_LOAD;
+ iram1_0_phdr PT_LOAD;
+ irom0_0_phdr PT_LOAD;
+}
+
+ENTRY(call_user_start)
+
+PROVIDE(_memmap_vecbase_reset = 0x40000000);
+
+/* Various memory-map dependent cache attribute settings: */
+_memmap_cacheattr_wb_base = 0x00000110;
+_memmap_cacheattr_wt_base = 0x00000110;
+_memmap_cacheattr_bp_base = 0x00000220;
+_memmap_cacheattr_unused_mask = 0xFFFFF00F;
+_memmap_cacheattr_wb_trapnull = 0x2222211F;
+_memmap_cacheattr_wba_trapnull = 0x2222211F;
+_memmap_cacheattr_wbna_trapnull = 0x2222211F;
+_memmap_cacheattr_wt_trapnull = 0x2222211F;
+_memmap_cacheattr_bp_trapnull = 0x2222222F;
+_memmap_cacheattr_wb_strict = 0xFFFFF11F;
+_memmap_cacheattr_wt_strict = 0xFFFFF11F;
+_memmap_cacheattr_bp_strict = 0xFFFFF22F;
+_memmap_cacheattr_wb_allvalid = 0x22222112;
+_memmap_cacheattr_wt_allvalid = 0x22222112;
+_memmap_cacheattr_bp_allvalid = 0x22222222;
+PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
+
+SECTIONS
+{
+
+ .dport0.rodata : ALIGN(4)
+ {
+ _dport0_rodata_start = ABSOLUTE(.);
+ *(.dport0.rodata)
+ *(.dport.rodata)
+ _dport0_rodata_end = ABSOLUTE(.);
+ } >dport0_0_seg :dport0_0_phdr
+
+ .dport0.literal : ALIGN(4)
+ {
+ _dport0_literal_start = ABSOLUTE(.);
+ *(.dport0.literal)
+ *(.dport.literal)
+ _dport0_literal_end = ABSOLUTE(.);
+ } >dport0_0_seg :dport0_0_phdr
+
+ .dport0.data : ALIGN(4)
+ {
+ _dport0_data_start = ABSOLUTE(.);
+ *(.dport0.data)
+ *(.dport.data)
+ _dport0_data_end = ABSOLUTE(.);
+ } >dport0_0_seg :dport0_0_phdr
+
+ .data : ALIGN(4)
+ {
+ _data_start = ABSOLUTE(.);
+ *(.data)
+ *(.data.*)
+ *(.gnu.linkonce.d.*)
+ *(.data1)
+ *(.sdata)
+ *(.sdata.*)
+ *(.gnu.linkonce.s.*)
+ *(.sdata2)
+ *(.sdata2.*)
+ *(.gnu.linkonce.s2.*)
+ *(.jcr)
+ _data_end = ABSOLUTE(.);
+ } >dram0_0_seg :dram0_0_phdr
+
+ .rodata : ALIGN(4)
+ {
+ _rodata_start = ABSOLUTE(.);
+ *(.rodata)
+ *(.rodata.*)
+ *(.gnu.linkonce.r.*)
+ *(.rodata1)
+ __XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
+ *(.xt_except_table)
+ *(.gcc_except_table)
+ *(.gnu.linkonce.e.*)
+ *(.gnu.version_r)
+ *(.eh_frame)
+ /* C++ constructor and destructor tables, properly ordered: */
+ KEEP (*crtbegin.o(.ctors))
+ KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ KEEP (*crtbegin.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ /* C++ exception handlers table: */
+ __XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
+ *(.xt_except_desc)
+ *(.gnu.linkonce.h.*)
+ __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
+ *(.xt_except_desc_end)
+ *(.dynamic)
+ *(.gnu.version_d)
+ . = ALIGN(4); /* this table MUST be 4-byte aligned */
+ _bss_table_start = ABSOLUTE(.);
+ LONG(_bss_start)
+ LONG(_bss_end)
+ _bss_table_end = ABSOLUTE(.);
+ _rodata_end = ABSOLUTE(.);
+ } >dram0_0_seg :dram0_0_phdr
+
+ .bss ALIGN(8) (NOLOAD) : ALIGN(4)
+ {
+ . = ALIGN (8);
+ _bss_start = ABSOLUTE(.);
+ *(.dynsbss)
+ *(.sbss)
+ *(.sbss.*)
+ *(.gnu.linkonce.sb.*)
+ *(.scommon)
+ *(.sbss2)
+ *(.sbss2.*)
+ *(.gnu.linkonce.sb2.*)
+ *(.dynbss)
+ *(.bss)
+ *(.bss.*)
+ *(.gnu.linkonce.b.*)
+ *(COMMON)
+ . = ALIGN (8);
+ _bss_end = ABSOLUTE(.);
+ _heap_start = ABSOLUTE(.);
+ } >dram0_0_seg :dram0_0_bss_phdr
+
+ .irom0.text : ALIGN(4)
+ {
+ _irom0_text_start = ABSOLUTE(.);
+ *(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
+ *py*.o*(.literal* .text*)
+ _irom0_text_end = ABSOLUTE(.);
+ } >irom0_0_seg :irom0_0_phdr
+
+ .text : ALIGN(4)
+ {
+ _stext = .;
+ _text_start = ABSOLUTE(.);
+ *(.entry.text)
+ *(.init.literal)
+ *(.init)
+ *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
+ *(.fini.literal)
+ *(.fini)
+ *(.gnu.version)
+ _text_end = ABSOLUTE(.);
+ _etext = .;
+ } >iram1_0_seg :iram1_0_phdr
+
+ .lit4 : ALIGN(4)
+ {
+ _lit4_start = ABSOLUTE(.);
+ *(*.lit4)
+ *(.lit4.*)
+ *(.gnu.linkonce.lit4.*)
+ _lit4_end = ABSOLUTE(.);
+ } >iram1_0_seg :iram1_0_phdr
+}
+
+/* get ROM code address */
+INCLUDE "eagle.rom.addr.v6.ld"
diff --git a/esp8266/esp_mphal.c b/esp8266/esp_mphal.c
new file mode 100644
index 0000000000..821866f689
--- /dev/null
+++ b/esp8266/esp_mphal.c
@@ -0,0 +1,92 @@
+/*
+ * This file is part of the Micro Python project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2014 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdio.h>
+#include "ets_sys.h"
+#include "etshal.h"
+#include "uart.h"
+#include "esp_mphal.h"
+
+extern void ets_wdt_disable(void);
+extern void wdt_feed(void);
+extern void ets_delay_us();
+
+void mp_hal_init(void) {
+ ets_wdt_disable(); // it's a pain while developing
+ uart_init(UART_BIT_RATE_115200, UART_BIT_RATE_115200);
+}
+
+void mp_hal_feed_watchdog(void) {
+ //ets_wdt_disable(); // it's a pain while developing
+ //WRITE_PERI_REG(0x60000914, 0x73);
+ //wdt_feed(); // might also work
+}
+
+void mp_hal_udelay(uint32_t us) {
+ ets_delay_us(us);
+}
+
+int mp_hal_uart0_rx_chr(void) {
+ return uart0_rx();
+}
+
+void mp_hal_uart0_write_str(const char *str) {
+ while (*str) {
+ uart_tx_one_char(UART0, *str++);
+ }
+}
+
+void mp_hal_uart0_write_strn(const char *str, uint32_t len) {
+ while (len--) {
+ uart_tx_one_char(UART0, *str++);
+ }
+}
+
+void mp_hal_uart0_write_strn_cooked(const char *str, uint32_t len) {
+ while (len--) {
+ if (*str == '\n') {
+ uart_tx_one_char(UART0, '\r');
+ }
+ uart_tx_one_char(UART0, *str++);
+ }
+}
+
+uint32_t HAL_GetTick(void) {
+ // TODO
+ return 0;
+}
+
+void HAL_Delay(uint32_t Delay) {
+ mp_hal_udelay(Delay * 1000);
+}
+
+void mp_hal_set_interrupt_char(int c) {
+ // TODO
+}
+
+uint32_t mp_hal_get_cpu_freq(void) {
+ return ets_get_cpu_frequency();
+}
diff --git a/esp8266/esp_mphal.h b/esp8266/esp_mphal.h
new file mode 100644
index 0000000000..e80ede9c91
--- /dev/null
+++ b/esp8266/esp_mphal.h
@@ -0,0 +1,43 @@
+/*
+ * This file is part of the Micro Python project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2014 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef _INCLUDED_MPHAL_H_
+#define _INCLUDED_MPHAL_H_
+
+void mp_hal_init(void);
+void mp_hal_feed_watchdog(void);
+void mp_hal_udelay(uint32_t);
+int mp_hal_uart0_rx_chr(void);
+void mp_hal_uart0_write_str(const char *str);
+void mp_hal_uart0_write_strn(const char *str, uint32_t len);
+void mp_hal_uart0_write_strn_cooked(const char *str, uint32_t len);
+
+uint32_t HAL_GetTick(void);
+void HAL_Delay(uint32_t Delay);
+void mp_hal_set_interrupt_char(int c);
+uint32_t mp_hal_get_cpu_freq(void);
+
+#endif // _INCLUDED_MPHAL_H_
diff --git a/esp8266/etshal.h b/esp8266/etshal.h
new file mode 100644
index 0000000000..5ee67d027f
--- /dev/null
+++ b/esp8266/etshal.h
@@ -0,0 +1,10 @@
+#ifndef _INCLUDED_ETSHAL_H_
+#define _INCLUDED_ETSHAL_H_
+
+void ets_isr_unmask();
+void ets_install_putc1();
+void ets_isr_attach();
+void uart_div_modify();
+uint32_t ets_get_cpu_frequency();
+
+#endif // _INCLUDED_ETSHAL_H_
diff --git a/esp8266/gccollect.c b/esp8266/gccollect.c
new file mode 100644
index 0000000000..460ccb6889
--- /dev/null
+++ b/esp8266/gccollect.c
@@ -0,0 +1,65 @@
+/*
+ * This file is part of the Micro Python project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2014 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdio.h>
+#include <stdint.h>
+
+#include "mpconfig.h"
+#include "misc.h"
+#include "qstr.h"
+#include "obj.h"
+#include "gc.h"
+#include "gccollect.h"
+
+STATIC uint32_t stack_end;
+
+mp_uint_t gc_helper_get_regs_and_sp(mp_uint_t *regs);
+
+void gc_collect_init(void) {
+ mp_uint_t regs[8];
+ mp_uint_t sp = gc_helper_get_regs_and_sp(regs);
+ stack_end = sp;
+ //printf("stack=%p ram_end=%p %d\n", stack_end, &_ram_end);
+}
+
+void gc_collect(void) {
+ // start the GC
+ gc_collect_start();
+
+ // We need to scan everything in RAM that can hold a pointer.
+ // The data segment is used, but should not contain pointers, so we just scan the bss.
+ gc_collect_root((void**)&_bss_start, ((uint32_t)&_bss_end - (uint32_t)&_bss_start) / sizeof(uint32_t));
+
+ // get the registers and the sp
+ mp_uint_t regs[8];
+ mp_uint_t sp = gc_helper_get_regs_and_sp(regs);
+
+ // trace the stack, including the registers (since they live on the stack in this function)
+ gc_collect_root((void**)sp, (stack_end - sp) / sizeof(uint32_t));
+
+ // end the GC
+ gc_collect_end();
+}
diff --git a/esp8266/gccollect.h b/esp8266/gccollect.h
new file mode 100644
index 0000000000..b1804d30e2
--- /dev/null
+++ b/esp8266/gccollect.h
@@ -0,0 +1,41 @@
+/*
+ * This file is part of the Micro Python project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2014 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+extern uint32_t _text_start;
+extern uint32_t _text_end;
+extern uint32_t _irom0_text_start;
+extern uint32_t _irom0_text_end;
+extern uint32_t _data_start;
+extern uint32_t _data_end;
+extern uint32_t _rodata_start;
+extern uint32_t _rodata_end;
+extern uint32_t _bss_start;
+extern uint32_t _bss_end;
+extern uint32_t _heap_start;
+extern uint32_t _heap_end;
+
+void gc_collect_init(void);
+void gc_collect(void);
diff --git a/esp8266/gchelper.s b/esp8266/gchelper.s
new file mode 100644
index 0000000000..cf543be800
--- /dev/null
+++ b/esp8266/gchelper.s
@@ -0,0 +1,22 @@
+ .file "gchelper.s"
+ .text
+
+ .align 4
+ .global gc_helper_get_regs_and_sp
+ .type gc_helper_get_regs_and_sp, @function
+gc_helper_get_regs_and_sp:
+ # store regs into given array
+ s32i.n a8, a2, 0
+ s32i.n a9, a2, 4
+ s32i.n a10, a2, 8
+ s32i.n a11, a2, 12
+ s32i.n a12, a2, 16
+ s32i.n a13, a2, 20
+ s32i.n a14, a2, 24
+ s32i.n a15, a2, 28
+
+ # return the sp
+ mov a2, a1
+ ret.n
+
+ .size gc_helper_get_regs_and_sp, .-gc_helper_get_regs_and_sp
diff --git a/esp8266/main.c b/esp8266/main.c
new file mode 100644
index 0000000000..bab79d6fc5
--- /dev/null
+++ b/esp8266/main.c
@@ -0,0 +1,94 @@
+/*
+ * This file is part of the Micro Python project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2014 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdio.h>
+#include <string.h>
+
+#include "mpconfig.h"
+#include "nlr.h"
+#include "misc.h"
+#include "qstr.h"
+#include "lexer.h"
+#include "parse.h"
+#include "obj.h"
+#include "parsehelper.h"
+#include "compile.h"
+#include "runtime0.h"
+#include "runtime.h"
+#include "gc.h"
+#include "pyexec.h"
+#include "gccollect.h"
+#include MICROPY_HAL_H
+
+void user_init(void) {
+ //mp_stack_set_limit((char*)&_ram_end - (char*)&_heap_end - 1024);
+ mp_hal_init();
+ gc_init(&_heap_start, &_heap_end);
+ gc_collect_init();
+ mp_init();
+ mp_obj_list_init(mp_sys_path, 0);
+ mp_obj_list_init(mp_sys_argv, 0);
+
+ printf("\n");
+
+ for (;;) {
+ if (pyexec_mode_kind == PYEXEC_MODE_RAW_REPL) {
+ if (pyexec_raw_repl() != 0) {
+ break;
+ }
+ } else {
+ if (pyexec_friendly_repl() != 0) {
+ break;
+ }
+ }
+ }
+}
+
+mp_lexer_t *mp_lexer_new_from_file(const char *filename) {
+ return NULL;
+}
+
+mp_import_stat_t mp_import_stat(const char *path) {
+ return MP_IMPORT_STAT_NO_EXIST;
+}
+
+mp_obj_t mp_builtin_open(uint n_args, const mp_obj_t *args, mp_map_t *kwargs) {
+ return mp_const_none;
+}
+MP_DEFINE_CONST_FUN_OBJ_KW(mp_builtin_open_obj, 1, mp_builtin_open);
+
+void nlr_jump_fail(void *val) {
+ printf("NLR jump failed\n");
+ for (;;) {
+ }
+}
+
+//void __assert(const char *file, int line, const char *func, const char *expr) {
+void __assert(const char *file, int line, const char *expr) {
+ printf("Assertion '%s' failed, at file %s:%d\n", expr, file, line);
+ for (;;) {
+ }
+}
diff --git a/esp8266/makeimg.py b/esp8266/makeimg.py
new file mode 100644
index 0000000000..1ac681cb74
--- /dev/null
+++ b/esp8266/makeimg.py
@@ -0,0 +1,21 @@
+import sys
+
+assert len(sys.argv) == 4
+
+with open(sys.argv[3], 'wb') as fout:
+
+ with open(sys.argv[1], 'rb') as f:
+ data_flash = f.read()
+ fout.write(data_flash)
+ print('flash ', len(data_flash))
+
+ pad = b'\xff' * (0x10000 - len(data_flash))
+ fout.write(pad)
+ print('padding ', len(pad))
+
+ with open(sys.argv[2], 'rb') as f:
+ data_rom = f.read()
+ fout.write(data_rom)
+ print('irom0text', len(data_rom))
+
+ print('total ', 0x10000 + len(data_rom))
diff --git a/esp8266/modpyb.c b/esp8266/modpyb.c
new file mode 100644
index 0000000000..49df418a2c
--- /dev/null
+++ b/esp8266/modpyb.c
@@ -0,0 +1,173 @@
+/*
+ * This file is part of the Micro Python project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2014 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdint.h>
+#include <stdio.h>
+
+#include "mpconfig.h"
+#include "misc.h"
+#include "nlr.h"
+#include "qstr.h"
+#include "obj.h"
+#include "gc.h"
+#include "gccollect.h"
+#include "pyexec.h"
+#include "pybstdio.h"
+#include MICROPY_HAL_H
+
+STATIC mp_obj_t pyb_info(mp_uint_t n_args, const mp_obj_t *args) {
+ // print info about memory
+ {
+ printf("_text_start=%p\n", &_text_start);
+ printf("_text_end=%p\n", &_text_end);
+ printf("_irom0_text_start=%p\n", &_irom0_text_start);
+ printf("_irom0_text_end=%p\n", &_irom0_text_end);
+ printf("_data_start=%p\n", &_data_start);
+ printf("_data_end=%p\n", &_data_end);
+ printf("_rodata_start=%p\n", &_rodata_start);
+ printf("_rodata_end=%p\n", &_rodata_end);
+ printf("_bss_start=%p\n", &_bss_start);
+ printf("_bss_end=%p\n", &_bss_end);
+ printf("_heap_start=%p\n", &_heap_start);
+ printf("_heap_end=%p\n", &_heap_end);
+ }
+
+ // qstr info
+ {
+ mp_uint_t n_pool, n_qstr, n_str_data_bytes, n_total_bytes;
+ qstr_pool_info(&n_pool, &n_qstr, &n_str_data_bytes, &n_total_bytes);
+ printf("qstr:\n n_pool=" UINT_FMT "\n n_qstr=" UINT_FMT "\n n_str_data_bytes=" UINT_FMT "\n n_total_bytes=" UINT_FMT "\n", n_pool, n_qstr, n_str_data_bytes, n_total_bytes);
+ }
+
+ // GC info
+ {
+ gc_info_t info;
+ gc_info(&info);
+ printf("GC:\n");
+ printf(" " UINT_FMT " total\n", info.total);
+ printf(" " UINT_FMT " : " UINT_FMT "\n", info.used, info.free);
+ printf(" 1=" UINT_FMT " 2=" UINT_FMT " m=" UINT_FMT "\n", info.num_1block, info.num_2block, info.max_block);
+ }
+
+ if (n_args == 1) {
+ // arg given means dump gc allocation table
+ gc_dump_alloc_table();
+ }
+
+ return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_info_obj, 0, 1, pyb_info);
+
+STATIC mp_obj_t pyb_freq(mp_uint_t n_args, const mp_obj_t *args) {
+ if (n_args == 0) {
+ // get
+ return mp_obj_new_int(mp_hal_get_cpu_freq());
+ } else {
+ // set
+ nlr_raise(mp_obj_new_exception_msg(&mp_type_ValueError, "can't change freq"));
+ }
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_freq_obj, 0, 1, pyb_freq);
+
+STATIC mp_obj_t pyb_sync(void) {
+ //storage_flush();
+ return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_sync_obj, pyb_sync);
+
+STATIC mp_obj_t pyb_millis(void) {
+ return MP_OBJ_NEW_SMALL_INT(HAL_GetTick());
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_millis_obj, pyb_millis);
+
+STATIC mp_obj_t pyb_elapsed_millis(mp_obj_t start) {
+ uint32_t startMillis = mp_obj_get_int(start);
+ uint32_t currMillis = HAL_GetTick();
+ return MP_OBJ_NEW_SMALL_INT((currMillis - startMillis) & 0x3fffffff);
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_elapsed_millis_obj, pyb_elapsed_millis);
+
+STATIC mp_obj_t pyb_micros(void) {
+ return MP_OBJ_NEW_SMALL_INT(0);
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_0(pyb_micros_obj, pyb_micros);
+
+STATIC mp_obj_t pyb_elapsed_micros(mp_obj_t start) {
+ uint32_t startMicros = mp_obj_get_int(start);
+ uint32_t currMicros = 0;
+ return MP_OBJ_NEW_SMALL_INT((currMicros - startMicros) & 0x3fffffff);
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_elapsed_micros_obj, pyb_elapsed_micros);
+
+STATIC mp_obj_t pyb_delay(mp_obj_t ms_in) {
+ mp_int_t ms = mp_obj_get_int(ms_in);
+ if (ms >= 0) {
+ HAL_Delay(ms);
+ }
+ return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_delay_obj, pyb_delay);
+
+STATIC mp_obj_t pyb_udelay(mp_obj_t usec_in) {
+ mp_int_t usec = mp_obj_get_int(usec_in);
+ if (usec >= 0) {
+ mp_hal_udelay(usec);
+ }
+ return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_udelay_obj, pyb_udelay);
+
+STATIC const mp_map_elem_t pyb_module_globals_table[] = {
+ { MP_OBJ_NEW_QSTR(MP_QSTR___name__), MP_OBJ_NEW_QSTR(MP_QSTR_pyb) },
+
+ { MP_OBJ_NEW_QSTR(MP_QSTR_info), (mp_obj_t)&pyb_info_obj },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_freq), (mp_obj_t)&pyb_freq_obj },
+
+ { MP_OBJ_NEW_QSTR(MP_QSTR_millis), (mp_obj_t)&pyb_millis_obj },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_elapsed_millis), (mp_obj_t)&pyb_elapsed_millis_obj },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_micros), (mp_obj_t)&pyb_micros_obj },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_elapsed_micros), (mp_obj_t)&pyb_elapsed_micros_obj },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_delay), (mp_obj_t)&pyb_delay_obj },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_udelay), (mp_obj_t)&pyb_udelay_obj },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_sync), (mp_obj_t)&pyb_sync_obj },
+};
+
+STATIC const mp_obj_dict_t pyb_module_globals = {
+ .base = {&mp_type_dict},
+ .map = {
+ .all_keys_are_qstrs = 1,
+ .table_is_fixed_array = 1,
+ .used = MP_ARRAY_SIZE(pyb_module_globals_table),
+ .alloc = MP_ARRAY_SIZE(pyb_module_globals_table),
+ .table = (mp_map_elem_t*)pyb_module_globals_table,
+ },
+};
+
+const mp_obj_module_t pyb_module = {
+ .base = { &mp_type_module },
+ .name = MP_QSTR_pyb,
+ .globals = (mp_obj_dict_t*)&pyb_module_globals,
+};
diff --git a/esp8266/mpconfigport.h b/esp8266/mpconfigport.h
new file mode 100644
index 0000000000..8a225a0c18
--- /dev/null
+++ b/esp8266/mpconfigport.h
@@ -0,0 +1,71 @@
+#include <stdint.h>
+
+// options to control how Micro Python is built
+
+#define MICROPY_ALLOC_PATH_MAX (128)
+#define MICROPY_EMIT_X64 (0)
+#define MICROPY_EMIT_THUMB (0)
+#define MICROPY_EMIT_INLINE_THUMB (0)
+#define MICROPY_MEM_STATS (0)
+#define MICROPY_DEBUG_PRINTERS (0)
+#define MICROPY_ENABLE_GC (1)
+#define MICROPY_HELPER_REPL (1)
+#define MICROPY_HELPER_LEXER_UNIX (0)
+#define MICROPY_ENABLE_SOURCE_LINE (1)
+#define MICROPY_PY_BUILTINS_STR_UNICODE (1)
+#define MICROPY_PY_BUILTINS_BYTEARRAY (1)
+#define MICROPY_PY_BUILTINS_MEMORYVIEW (1)
+#define MICROPY_PY_BUILTINS_FROZENSET (1)
+#define MICROPY_PY_BUILTINS_SET (1)
+#define MICROPY_PY_BUILTINS_SLICE (1)
+#define MICROPY_PY_BUILTINS_PROPERTY (1)
+#define MICROPY_PY___FILE__ (0)
+#define MICROPY_PY_GC (1)
+#define MICROPY_PY_ARRAY (1)
+#define MICROPY_PY_COLLECTIONS (1)
+#define MICROPY_PY_MATH (0)
+#define MICROPY_PY_CMATH (0)
+#define MICROPY_PY_IO (1)
+#define MICROPY_PY_STRUCT (1)
+#define MICROPY_PY_SYS (1)
+#define MICROPY_PY_SYS_EXIT (1)
+#define MICROPY_PY_SYS_STDFILES (1)
+#define MICROPY_CPYTHON_COMPAT (0)
+#define MICROPY_LONGINT_IMPL (MICROPY_LONGINT_IMPL_MPZ)
+#define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_NONE)
+#define MICROPY_ERROR_REPORTING (MICROPY_ERROR_REPORTING_TERSE)
+
+// type definitions for the specific machine
+
+#define BYTES_PER_WORD (4)
+
+#define MICROPY_MAKE_POINTER_CALLABLE(p) ((void*)((mp_uint_t)(p)))
+
+#define UINT_FMT "%u"
+#define INT_FMT "%d"
+
+typedef int32_t mp_int_t; // must be pointer size
+typedef uint32_t mp_uint_t; // must be pointer size
+typedef void *machine_ptr_t; // must be of pointer size
+typedef const void *machine_const_ptr_t; // must be of pointer size
+typedef long mp_off_t;
+
+// extra built in names to add to the global namespace
+extern const struct _mp_obj_fun_builtin_t mp_builtin_open_obj;
+#define MICROPY_PORT_BUILTINS \
+ { MP_OBJ_NEW_QSTR(MP_QSTR_open), (mp_obj_t)&mp_builtin_open_obj },
+
+// extra built in modules to add to the list of known ones
+extern const struct _mp_obj_module_t pyb_module;
+
+#define MICROPY_PORT_BUILTIN_MODULES \
+ { MP_OBJ_NEW_QSTR(MP_QSTR_pyb), (mp_obj_t)&pyb_module }, \
+
+// We need to provide a declaration/definition of alloca()
+#include <alloca.h>
+
+// board specifics
+
+#define MICROPY_HAL_H "esp_mphal.h"
+#define MICROPY_HW_BOARD_NAME "ESP module"
+#define MICROPY_HW_MCU_NAME "ESP8266"
diff --git a/esp8266/pybstdio.c b/esp8266/pybstdio.c
new file mode 100644
index 0000000000..1b611486c6
--- /dev/null
+++ b/esp8266/pybstdio.c
@@ -0,0 +1,145 @@
+/*
+ * This file is part of the Micro Python project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2014 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>
+#include <errno.h>
+
+#include "mpconfig.h"
+#include "misc.h"
+#include "qstr.h"
+#include "misc.h"
+#include "obj.h"
+#include "stream.h"
+#include "pybstdio.h"
+#include MICROPY_HAL_H
+
+void stdout_tx_str(const char *str) {
+ stdout_tx_strn(str, strlen(str));
+}
+
+void stdout_tx_strn(const char *str, mp_uint_t len) {
+ mp_hal_uart0_write_strn(str, len);
+}
+
+void stdout_tx_strn_cooked(const char *str, mp_uint_t len) {
+ mp_hal_uart0_write_strn_cooked(str, len);
+}
+
+int stdin_rx_chr(void) {
+ for (;;) {
+ int c = mp_hal_uart0_rx_chr();
+ if (c != -1) {
+ return c;
+ }
+ mp_hal_udelay(1);
+ mp_hal_feed_watchdog();
+ }
+}
+
+/******************************************************************************/
+// Micro Python bindings
+
+#define STDIO_FD_IN (0)
+#define STDIO_FD_OUT (1)
+#define STDIO_FD_ERR (2)
+
+typedef struct _pyb_stdio_obj_t {
+ mp_obj_base_t base;
+ int fd;
+} pyb_stdio_obj_t;
+
+void stdio_obj_print(void (*print)(void *env, const char *fmt, ...), void *env, mp_obj_t self_in, mp_print_kind_t kind) {
+ pyb_stdio_obj_t *self = self_in;
+ print(env, "<io.FileIO %d>", self->fd);
+}
+
+STATIC mp_uint_t stdio_read(mp_obj_t self_in, void *buf, mp_uint_t size, int *errcode) {
+ pyb_stdio_obj_t *self = self_in;
+ if (self->fd == STDIO_FD_IN) {
+ for (uint i = 0; i < size; i++) {
+ int c = stdin_rx_chr();
+ if (c == '\r') {
+ c = '\n';
+ }
+ ((byte*)buf)[i] = c;
+ }
+ return size;
+ } else {
+ *errcode = EPERM;
+ return MP_STREAM_ERROR;
+ }
+}
+
+STATIC mp_uint_t stdio_write(mp_obj_t self_in, const void *buf, mp_uint_t size, int *errcode) {
+ pyb_stdio_obj_t *self = self_in;
+ if (self->fd == STDIO_FD_OUT || self->fd == STDIO_FD_ERR) {
+ stdout_tx_strn_cooked(buf, size);
+ return size;
+ } else {
+ *errcode = EPERM;
+ return MP_STREAM_ERROR;
+ }
+}
+
+STATIC mp_obj_t stdio_obj___exit__(mp_uint_t n_args, const mp_obj_t *args) {
+ return mp_const_none;
+}
+STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(stdio_obj___exit___obj, 4, 4, stdio_obj___exit__);
+
+STATIC const mp_map_elem_t stdio_locals_dict_table[] = {
+ { MP_OBJ_NEW_QSTR(MP_QSTR_read), (mp_obj_t)&mp_stream_read_obj },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_readall), (mp_obj_t)&mp_stream_readall_obj },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_readline), (mp_obj_t)&mp_stream_unbuffered_readline_obj},
+ { MP_OBJ_NEW_QSTR(MP_QSTR_write), (mp_obj_t)&mp_stream_write_obj },
+ { MP_OBJ_NEW_QSTR(MP_QSTR_close), (mp_obj_t)&mp_identity_obj },
+ { MP_OBJ_NEW_QSTR(MP_QSTR___del__), (mp_obj_t)&mp_identity_obj },
+ { MP_OBJ_NEW_QSTR(MP_QSTR___enter__), (mp_obj_t)&mp_identity_obj },
+ { MP_OBJ_NEW_QSTR(MP_QSTR___exit__), (mp_obj_t)&stdio_obj___exit___obj },
+};
+
+STATIC MP_DEFINE_CONST_DICT(stdio_locals_dict, stdio_locals_dict_table);
+
+STATIC const mp_stream_p_t stdio_obj_stream_p = {
+ .read = stdio_read,
+ .write = stdio_write,
+ .is_text = true,
+};
+
+STATIC const mp_obj_type_t stdio_obj_type = {
+ { &mp_type_type },
+ .name = MP_QSTR_FileIO,
+ .print = stdio_obj_print,
+ .getiter = mp_identity,
+ .iternext = mp_stream_unbuffered_iter,
+ .stream_p = &stdio_obj_stream_p,
+ .locals_dict = (mp_obj_t)&stdio_locals_dict,
+};
+
+const pyb_stdio_obj_t mp_sys_stdin_obj = {{&stdio_obj_type}, .fd = STDIO_FD_IN};
+const pyb_stdio_obj_t mp_sys_stdout_obj = {{&stdio_obj_type}, .fd = STDIO_FD_OUT};
+const pyb_stdio_obj_t mp_sys_stderr_obj = {{&stdio_obj_type}, .fd = STDIO_FD_ERR};
diff --git a/esp8266/pybstdio.h b/esp8266/pybstdio.h
new file mode 100644
index 0000000000..bd854f18cb
--- /dev/null
+++ b/esp8266/pybstdio.h
@@ -0,0 +1,30 @@
+/*
+ * This file is part of the Micro Python project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2014 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+void stdout_tx_str(const char *str);
+void stdout_tx_strn(const char *str, mp_uint_t len);
+void stdout_tx_strn_cooked(const char *str, mp_uint_t len);
+int stdin_rx_chr(void);
diff --git a/esp8266/qstrdefsport.h b/esp8266/qstrdefsport.h
new file mode 100644
index 0000000000..0f34bcd4c3
--- /dev/null
+++ b/esp8266/qstrdefsport.h
@@ -0,0 +1,41 @@
+/*
+ * This file is part of the Micro Python project, http://micropython.org/
+ *
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2014 Damien P. George
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+// qstrs specific to this port
+
+Q(help)
+
+// pyb module
+Q(pyb)
+Q(info)
+Q(freq)
+Q(millis)
+Q(elapsed_millis)
+Q(micros)
+Q(elapsed_micros)
+Q(delay)
+Q(udelay)
+Q(sync)
diff --git a/esp8266/uart.c b/esp8266/uart.c
new file mode 100644
index 0000000000..c037b997a4
--- /dev/null
+++ b/esp8266/uart.c
@@ -0,0 +1,191 @@
+/******************************************************************************
+ * Copyright 2013-2014 Espressif Systems (Wuxi)
+ *
+ * FileName: uart.c
+ *
+ * Description: Two UART mode configration and interrupt handler.
+ * Check your hardware connection while use this mode.
+ *
+ * Modification history:
+ * 2014/3/12, v1.0 create this file.
+*******************************************************************************/
+#include "ets_sys.h"
+#include "osapi.h"
+#include "uart.h"
+#include "osapi.h"
+#include "uart_register.h"
+#include "etshal.h"
+#include "c_types.h"
+
+#define RX_BUF_SIZE (256)
+
+// UartDev is defined and initialized in rom code.
+extern UartDevice UartDev;
+
+// circular buffer for RX buffering
+static uint16_t rx_buf_in;
+static uint16_t rx_buf_out;
+static uint8_t rx_buf[RX_BUF_SIZE];
+
+static void uart0_rx_intr_handler(void *para);
+
+/******************************************************************************
+ * FunctionName : uart_config
+ * Description : Internal used function
+ * UART0 used for data TX/RX, RX buffer size is 0x100, interrupt enabled
+ * UART1 just used for debug output
+ * Parameters : uart_no, use UART0 or UART1 defined ahead
+ * Returns : NONE
+*******************************************************************************/
+static void ICACHE_FLASH_ATTR uart_config(uint8 uart_no) {
+ if (uart_no == UART1) {
+ PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK);
+ } else {
+ ETS_UART_INTR_ATTACH(uart0_rx_intr_handler, NULL);
+ PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);
+ PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);
+ PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_U0RTS);
+ }
+
+ uart_div_modify(uart_no, UART_CLK_FREQ / (UartDev.baut_rate));
+
+ WRITE_PERI_REG(UART_CONF0(uart_no), UartDev.exist_parity
+ | UartDev.parity
+ | (UartDev.stop_bits << UART_STOP_BIT_NUM_S)
+ | (UartDev.data_bits << UART_BIT_NUM_S));
+
+ // clear rx and tx fifo,not ready
+ SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);
+ CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);
+
+ if (uart_no == UART0) {
+ // set rx fifo trigger
+ WRITE_PERI_REG(UART_CONF1(uart_no),
+ ((0x10 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) |
+ ((0x10 & UART_RX_FLOW_THRHD) << UART_RX_FLOW_THRHD_S) |
+ UART_RX_FLOW_EN |
+ (0x02 & UART_RX_TOUT_THRHD) << UART_RX_TOUT_THRHD_S |
+ UART_RX_TOUT_EN);
+ SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_TOUT_INT_ENA |
+ UART_FRM_ERR_INT_ENA);
+ } else {
+ WRITE_PERI_REG(UART_CONF1(uart_no),
+ ((UartDev.rcv_buff.TrigLvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S));
+ }
+
+ // clear all interrupt
+ WRITE_PERI_REG(UART_INT_CLR(uart_no), 0xffff);
+ // enable rx_interrupt
+ SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA);
+
+ // init RX buffer
+ rx_buf_in = 0;
+ rx_buf_out = 0;
+}
+
+/******************************************************************************
+ * FunctionName : uart1_tx_one_char
+ * Description : Internal used function
+ * Use uart1 interface to transfer one char
+ * Parameters : uint8 TxChar - character to tx
+ * Returns : OK
+*******************************************************************************/
+void uart_tx_one_char(uint8 uart, uint8 TxChar) {
+ while (true) {
+ uint32 fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT<<UART_TXFIFO_CNT_S);
+ if ((fifo_cnt >> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) < 126) {
+ break;
+ }
+ }
+ WRITE_PERI_REG(UART_FIFO(uart), TxChar);
+}
+
+/******************************************************************************
+ * FunctionName : uart1_write_char
+ * Description : Internal used function
+ * Do some special deal while tx char is '\r' or '\n'
+ * Parameters : char c - character to tx
+ * Returns : NONE
+*******************************************************************************/
+static void ICACHE_FLASH_ATTR
+uart1_write_char(char c) {
+ if (c == '\n') {
+ uart_tx_one_char(UART1, '\r');
+ uart_tx_one_char(UART1, '\n');
+ } else if (c == '\r') {
+ } else {
+ uart_tx_one_char(UART1, c);
+ }
+}
+
+/******************************************************************************
+ * FunctionName : uart0_rx_intr_handler
+ * Description : Internal used function
+ * UART0 interrupt handler, add self handle code inside
+ * Parameters : void *para - point to ETS_UART_INTR_ATTACH's arg
+ * Returns : NONE
+*******************************************************************************/
+
+static void uart0_rx_intr_handler(void *para) {
+ /* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents
+ * uart1 and uart0 respectively
+ */
+
+ uint8 RcvChar;
+ uint8 uart_no = UART0;
+
+ if (UART_FRM_ERR_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_FRM_ERR_INT_ST)) {
+ // frame error
+ WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_FRM_ERR_INT_CLR);
+ }
+
+ if (UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_FULL_INT_ST)) {
+ // fifo full
+ WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_RXFIFO_FULL_INT_CLR);
+ goto read_chars;
+ } else if (UART_RXFIFO_TOUT_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_TOUT_INT_ST)) {
+ WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_RXFIFO_TOUT_INT_CLR);
+ read_chars:
+ while (READ_PERI_REG(UART_STATUS(uart_no)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) {
+ RcvChar = READ_PERI_REG(UART_FIFO(uart_no)) & 0xff;
+ uint16_t rx_buf_in_next = (rx_buf_in + 1) % RX_BUF_SIZE;
+ if (rx_buf_in_next != rx_buf_out) {
+ rx_buf[rx_buf_in] = RcvChar;
+ rx_buf_in = rx_buf_in_next;
+ }
+ }
+ }
+}
+
+int uart0_rx(void) {
+ if (rx_buf_out != rx_buf_in) {
+ int chr = rx_buf[rx_buf_out];
+ rx_buf_out = (rx_buf_out + 1) % RX_BUF_SIZE;
+ return chr;
+ } else {
+ return -1;
+ }
+}
+
+/******************************************************************************
+ * FunctionName : uart_init
+ * Description : user interface for init uart
+ * Parameters : UartBautRate uart0_br - uart0 bautrate
+ * UartBautRate uart1_br - uart1 bautrate
+ * Returns : NONE
+*******************************************************************************/
+void ICACHE_FLASH_ATTR uart_init(UartBautRate uart0_br, UartBautRate uart1_br) {
+ // rom use 74880 baut_rate, here reinitialize
+ UartDev.baut_rate = uart0_br;
+ uart_config(UART0);
+ UartDev.baut_rate = uart1_br;
+ uart_config(UART1);
+ ETS_UART_INTR_ENABLE();
+
+ // install uart1 putc callback
+ os_install_putc1((void *)uart1_write_char);
+}
+
+void ICACHE_FLASH_ATTR uart_reattach() {
+ uart_init(UART_BIT_RATE_74880, UART_BIT_RATE_74880);
+}
diff --git a/esp8266/uart.h b/esp8266/uart.h
new file mode 100644
index 0000000000..ce1438baf3
--- /dev/null
+++ b/esp8266/uart.h
@@ -0,0 +1,96 @@
+#ifndef _INCLUDED_UART_H_
+#define _INCLUDED_UART_H_
+
+#define UART0 (0)
+#define UART1 (1)
+
+typedef enum {
+ UART_FIVE_BITS = 0x0,
+ UART_SIX_BITS = 0x1,
+ UART_SEVEN_BITS = 0x2,
+ UART_EIGHT_BITS = 0x3
+} UartBitsNum4Char;
+
+typedef enum {
+ UART_ONE_STOP_BIT = 0,
+ UART_ONE_HALF_STOP_BIT = BIT2,
+ UART_TWO_STOP_BIT = BIT2
+} UartStopBitsNum;
+
+typedef enum {
+ UART_NONE_BITS = 0,
+ UART_ODD_BITS = 0,
+ UART_EVEN_BITS = BIT4
+} UartParityMode;
+
+typedef enum {
+ UART_STICK_PARITY_DIS = 0,
+ UART_STICK_PARITY_EN = BIT3 | BIT5
+} UartExistParity;
+
+typedef enum {
+ UART_BIT_RATE_9600 = 9600,
+ UART_BIT_RATE_19200 = 19200,
+ UART_BIT_RATE_38400 = 38400,
+ UART_BIT_RATE_57600 = 57600,
+ UART_BIT_RATE_74880 = 74880,
+ UART_BIT_RATE_115200 = 115200,
+ UART_BIT_RATE_230400 = 230400,
+ UART_BIT_RATE_256000 = 256000,
+ UART_BIT_RATE_460800 = 460800,
+ UART_BIT_RATE_921600 = 921600
+} UartBautRate;
+
+typedef enum {
+ UART_NONE_CTRL,
+ UART_HARDWARE_CTRL,
+ UART_XON_XOFF_CTRL
+} UartFlowCtrl;
+
+typedef enum {
+ UART_EMPTY,
+ UART_UNDER_WRITE,
+ UART_WRITE_OVER
+} RcvMsgBuffState;
+
+typedef struct {
+ uint32 RcvBuffSize;
+ uint8 *pRcvMsgBuff;
+ uint8 *pWritePos;
+ uint8 *pReadPos;
+ uint8 TrigLvl; //JLU: may need to pad
+ RcvMsgBuffState BuffState;
+} RcvMsgBuff;
+
+typedef struct {
+ uint32 TrxBuffSize;
+ uint8 *pTrxBuff;
+} TrxMsgBuff;
+
+typedef enum {
+ UART_BAUD_RATE_DET,
+ UART_WAIT_SYNC_FRM,
+ UART_SRCH_MSG_HEAD,
+ UART_RCV_MSG_BODY,
+ UART_RCV_ESC_CHAR,
+} RcvMsgState;
+
+typedef struct {
+ UartBautRate baut_rate;
+ UartBitsNum4Char data_bits;
+ UartExistParity exist_parity;
+ UartParityMode parity; // chip size in byte
+ UartStopBitsNum stop_bits;
+ UartFlowCtrl flow_ctrl;
+ RcvMsgBuff rcv_buff;
+ TrxMsgBuff trx_buff;
+ RcvMsgState rcv_state;
+ int received;
+ int buff_uart_no; //indicate which uart use tx/rx buffer
+} UartDevice;
+
+void uart_init(UartBautRate uart0_br, UartBautRate uart1_br);
+int uart0_rx(void);
+void uart_tx_one_char(uint8 uart, uint8 TxChar);
+
+#endif // _INCLUDED_UART_H_
diff --git a/esp8266/uart_register.h b/esp8266/uart_register.h
new file mode 100644
index 0000000000..6398879ee2
--- /dev/null
+++ b/esp8266/uart_register.h
@@ -0,0 +1,128 @@
+//Generated at 2012-07-03 18:44:06
+/*
+ * Copyright (c) 2010 - 2011 Espressif System
+ *
+ */
+
+#ifndef UART_REGISTER_H_INCLUDED
+#define UART_REGISTER_H_INCLUDED
+#define REG_UART_BASE( i ) (0x60000000+(i)*0xf00)
+//version value:32'h062000
+
+#define UART_FIFO( i ) (REG_UART_BASE( i ) + 0x0)
+#define UART_RXFIFO_RD_BYTE 0x000000FF
+#define UART_RXFIFO_RD_BYTE_S 0
+
+#define UART_INT_RAW( i ) (REG_UART_BASE( i ) + 0x4)
+#define UART_RXFIFO_TOUT_INT_RAW (BIT(8))
+#define UART_BRK_DET_INT_RAW (BIT(7))
+#define UART_CTS_CHG_INT_RAW (BIT(6))
+#define UART_DSR_CHG_INT_RAW (BIT(5))
+#define UART_RXFIFO_OVF_INT_RAW (BIT(4))
+#define UART_FRM_ERR_INT_RAW (BIT(3))
+#define UART_PARITY_ERR_INT_RAW (BIT(2))
+#define UART_TXFIFO_EMPTY_INT_RAW (BIT(1))
+#define UART_RXFIFO_FULL_INT_RAW (BIT(0))
+
+#define UART_INT_ST( i ) (REG_UART_BASE( i ) + 0x8)
+#define UART_RXFIFO_TOUT_INT_ST (BIT(8))
+#define UART_BRK_DET_INT_ST (BIT(7))
+#define UART_CTS_CHG_INT_ST (BIT(6))
+#define UART_DSR_CHG_INT_ST (BIT(5))
+#define UART_RXFIFO_OVF_INT_ST (BIT(4))
+#define UART_FRM_ERR_INT_ST (BIT(3))
+#define UART_PARITY_ERR_INT_ST (BIT(2))
+#define UART_TXFIFO_EMPTY_INT_ST (BIT(1))
+#define UART_RXFIFO_FULL_INT_ST (BIT(0))
+
+#define UART_INT_ENA( i ) (REG_UART_BASE( i ) + 0xC)
+#define UART_RXFIFO_TOUT_INT_ENA (BIT(8))
+#define UART_BRK_DET_INT_ENA (BIT(7))
+#define UART_CTS_CHG_INT_ENA (BIT(6))
+#define UART_DSR_CHG_INT_ENA (BIT(5))
+#define UART_RXFIFO_OVF_INT_ENA (BIT(4))
+#define UART_FRM_ERR_INT_ENA (BIT(3))
+#define UART_PARITY_ERR_INT_ENA (BIT(2))
+#define UART_TXFIFO_EMPTY_INT_ENA (BIT(1))
+#define UART_RXFIFO_FULL_INT_ENA (BIT(0))
+
+#define UART_INT_CLR( i ) (REG_UART_BASE( i ) + 0x10)
+#define UART_RXFIFO_TOUT_INT_CLR (BIT(8))
+#define UART_BRK_DET_INT_CLR (BIT(7))
+#define UART_CTS_CHG_INT_CLR (BIT(6))
+#define UART_DSR_CHG_INT_CLR (BIT(5))
+#define UART_RXFIFO_OVF_INT_CLR (BIT(4))
+#define UART_FRM_ERR_INT_CLR (BIT(3))
+#define UART_PARITY_ERR_INT_CLR (BIT(2))
+#define UART_TXFIFO_EMPTY_INT_CLR (BIT(1))
+#define UART_RXFIFO_FULL_INT_CLR (BIT(0))
+
+#define UART_CLKDIV( i ) (REG_UART_BASE( i ) + 0x14)
+#define UART_CLKDIV_CNT 0x000FFFFF
+#define UART_CLKDIV_S 0
+
+#define UART_AUTOBAUD( i ) (REG_UART_BASE( i ) + 0x18)
+#define UART_GLITCH_FILT 0x000000FF
+#define UART_GLITCH_FILT_S 8
+#define UART_AUTOBAUD_EN (BIT(0))
+
+#define UART_STATUS( i ) (REG_UART_BASE( i ) + 0x1C)
+#define UART_TXD (BIT(31))
+#define UART_RTSN (BIT(30))
+#define UART_DTRN (BIT(29))
+#define UART_TXFIFO_CNT 0x000000FF
+#define UART_TXFIFO_CNT_S 16
+#define UART_RXD (BIT(15))
+#define UART_CTSN (BIT(14))
+#define UART_DSRN (BIT(13))
+#define UART_RXFIFO_CNT 0x000000FF
+#define UART_RXFIFO_CNT_S 0
+
+#define UART_CONF0( i ) (REG_UART_BASE( i ) + 0x20)
+#define UART_TXFIFO_RST (BIT(18))
+#define UART_RXFIFO_RST (BIT(17))
+#define UART_IRDA_EN (BIT(16))
+#define UART_TX_FLOW_EN (BIT(15))
+#define UART_LOOPBACK (BIT(14))
+#define UART_IRDA_RX_INV (BIT(13))
+#define UART_IRDA_TX_INV (BIT(12))
+#define UART_IRDA_WCTL (BIT(11))
+#define UART_IRDA_TX_EN (BIT(10))
+#define UART_IRDA_DPLX (BIT(9))
+#define UART_TXD_BRK (BIT(8))
+#define UART_SW_DTR (BIT(7))
+#define UART_SW_RTS (BIT(6))
+#define UART_STOP_BIT_NUM 0x00000003
+#define UART_STOP_BIT_NUM_S 4
+#define UART_BIT_NUM 0x00000003
+#define UART_BIT_NUM_S 2
+#define UART_PARITY_EN (BIT(1))
+#define UART_PARITY (BIT(0))
+
+#define UART_CONF1( i ) (REG_UART_BASE( i ) + 0x24)
+#define UART_RX_TOUT_EN (BIT(31))
+#define UART_RX_TOUT_THRHD 0x0000007F
+#define UART_RX_TOUT_THRHD_S 24
+#define UART_RX_FLOW_EN (BIT(23))
+#define UART_RX_FLOW_THRHD 0x0000007F
+#define UART_RX_FLOW_THRHD_S 16
+#define UART_TXFIFO_EMPTY_THRHD 0x0000007F
+#define UART_TXFIFO_EMPTY_THRHD_S 8
+#define UART_RXFIFO_FULL_THRHD 0x0000007F
+#define UART_RXFIFO_FULL_THRHD_S 0
+
+#define UART_LOWPULSE( i ) (REG_UART_BASE( i ) + 0x28)
+#define UART_LOWPULSE_MIN_CNT 0x000FFFFF
+#define UART_LOWPULSE_MIN_CNT_S 0
+
+#define UART_HIGHPULSE( i ) (REG_UART_BASE( i ) + 0x2C)
+#define UART_HIGHPULSE_MIN_CNT 0x000FFFFF
+#define UART_HIGHPULSE_MIN_CNT_S 0
+
+#define UART_PULSE_NUM( i ) (REG_UART_BASE( i ) + 0x30)
+#define UART_PULSE_NUM_CNT 0x0003FF
+#define UART_PULSE_NUM_CNT_S 0
+
+#define UART_DATE( i ) (REG_UART_BASE( i ) + 0x78)
+#define UART_ID( i ) (REG_UART_BASE( i ) + 0x7C)
+#endif // UART_REGISTER_H_INCLUDED
diff --git a/esp8266/user_config.h b/esp8266/user_config.h
new file mode 100644
index 0000000000..8b1a393741
--- /dev/null
+++ b/esp8266/user_config.h
@@ -0,0 +1 @@
+// empty
generated by cgit v1.2.3 (git 2.39.1) at 2025-05-04 21:43:40 +0000