diff options
Diffstat (limited to 'cc3200/hal/prcm.c')
| -rw-r--r-- | cc3200/hal/prcm.c | 322 |
1 files changed, 199 insertions, 123 deletions
diff --git a/cc3200/hal/prcm.c b/cc3200/hal/prcm.c index 78b8d8276f..a7cab502fa 100644 --- a/cc3200/hal/prcm.c +++ b/cc3200/hal/prcm.c @@ -98,11 +98,8 @@ #define RTC_SECS_IN_U64MSEC(u64Msec) ((unsigned long)(u64Msec >> 10)) #define RTC_MSEC_IN_U64MSEC(u64Msec) ((unsigned short)(u64Msec & 0x3FF)) +#define RTC_MSEC_U32_REG_ADDR (HIB3P3_BASE + HIB3P3_O_MEM_HIB_REG2) #define RTC_SECS_U32_REG_ADDR (HIB3P3_BASE + HIB3P3_O_MEM_HIB_REG3) -#define RTC_MSEC_U16_REG_ADDR (HIB3P3_BASE + HIB3P3_O_MEM_HIB_REG2+2) - -#define RTC_U32SECS_REG (HWREG(RTC_SECS_U32_REG_ADDR)) -#define RTC_U16MSEC_REG (*(unsigned short*)RTC_MSEC_U16_REG_ADDR) //***************************************************************************** // Register Access and Updates @@ -110,14 +107,16 @@ // Tick of SCC has a resolution of 32768Hz. Therefore, scaling SCC value by 32 // yields ~1 msec resolution. All operations of SCC in RTC context use ms unit. //***************************************************************************** -#define SCC_U64MSEC_GET() (PRCMSlowClkCtrGet() >> 5) -#define SCC_U64MSEC_MATCH_SET(u64Msec) (PRCMSlowClkCtrMatchSet(u64Msec << 5)) -#define SCC_U64MSEC_MATCH_GET() (PRCMSlowClkCtrMatchGet() >> 5) +#define SCC_U64MSEC_GET() (MAP_PRCMSlowClkCtrGet() >> 5) +#define SCC_U64MSEC_MATCH_SET(u64Msec) (MAP_PRCMSlowClkCtrMatchSet(u64Msec << 5)) +#define SCC_U64MSEC_MATCH_GET() (MAP_PRCMSlowClkCtrMatchGet() >> 5) //***************************************************************************** // // Bit: 31 is used to indicate use of RTC. If set as '1', RTC feature is used. -// Bits: 30 to 26 are reserved, available to software for use +// Bit: 30 is used to indicate that a safe boot should be performed +// bit: 29 is used to indicate that the last reset was caused by the WDT +// Bits: 28 to 26 are unused // Bits: 25 to 16 are used to save millisecond part of RTC reference. // Bits: 15 to 0 are being used for HW Changes / ECO // @@ -130,25 +129,29 @@ static void RTCUseSet(void) { unsigned short usRegValue; - usRegValue = RTC_U16MSEC_REG | (1 << 15); - - UtilsDelay((80*200)/3); + usRegValue = MAP_PRCMHIBRegRead(RTC_MSEC_U32_REG_ADDR) | (1 << 31); - RTC_U16MSEC_REG = usRegValue; + PRCMHIBRegWrite(RTC_MSEC_U32_REG_ADDR, usRegValue); } //***************************************************************************** -// Checks if RTC-USE bit is set +// Clear RTC USE Bit //***************************************************************************** -static tBoolean IsRTCUsed(void) +static void RTCUseClear(void) { unsigned short usRegValue; - usRegValue = RTC_U16MSEC_REG; + usRegValue = MAP_PRCMHIBRegRead(RTC_MSEC_U32_REG_ADDR) & (~(1 << 31)); - UtilsDelay((80*200)/3); + PRCMHIBRegWrite(RTC_MSEC_U32_REG_ADDR, usRegValue); +} - return ((usRegValue & (1 << 15))? true : false); +//***************************************************************************** +// Checks if RTC-USE bit is set +//***************************************************************************** +static tBoolean IsRTCUsed(void) +{ + return (MAP_PRCMHIBRegRead(RTC_MSEC_U32_REG_ADDR) & (1 << 31)) ? true : false; } //***************************************************************************** @@ -156,13 +159,7 @@ static tBoolean IsRTCUsed(void) //***************************************************************************** static unsigned short RTCU16MSecRegRead(void) { - unsigned short usRegValue; - - usRegValue = RTC_U16MSEC_REG; - - UtilsDelay((80*200)/3); - - return (usRegValue & 0x3FF); + return ((MAP_PRCMHIBRegRead(RTC_MSEC_U32_REG_ADDR) >> 16) & 0x03FF); } //***************************************************************************** @@ -172,11 +169,11 @@ static void RTCU16MSecRegWrite(unsigned short u16Msec) { unsigned short usRegValue; - usRegValue = RTC_U16MSEC_REG; - - UtilsDelay((80*200)/3); + // read the whole register and clear the msec bits + usRegValue = MAP_PRCMHIBRegRead(RTC_MSEC_U32_REG_ADDR) & (~(0x03FF << 16)); - RTC_U16MSEC_REG = ((usRegValue & ~0x3FF) |u16Msec); + // write the msec bits only + MAP_PRCMHIBRegWrite(RTC_MSEC_U32_REG_ADDR, usRegValue | ((u16Msec & 0x03FF) << 16)); } //***************************************************************************** @@ -184,7 +181,7 @@ static void RTCU16MSecRegWrite(unsigned short u16Msec) //***************************************************************************** static unsigned long RTCU32SecRegRead(void) { - return (PRCMHIBRegRead(RTC_SECS_U32_REG_ADDR)); + return (MAP_PRCMHIBRegRead(RTC_SECS_U32_REG_ADDR)); } //***************************************************************************** @@ -192,7 +189,7 @@ static unsigned long RTCU32SecRegRead(void) //***************************************************************************** static void RTCU32SecRegWrite(unsigned long u32Msec) { - PRCMHIBRegWrite(RTC_SECS_U32_REG_ADDR, u32Msec); + MAP_PRCMHIBRegWrite(RTC_SECS_U32_REG_ADDR, u32Msec); } //***************************************************************************** @@ -200,6 +197,7 @@ static void RTCU32SecRegWrite(unsigned long u32Msec) //***************************************************************************** #define IS_RTC_USED() IsRTCUsed() #define RTC_USE_SET() RTCUseSet() +#define RTC_USE_CLR() RTCUseClear() #define RTC_U16MSEC_REG_RD() RTCU16MSecRegRead() #define RTC_U16MSEC_REG_WR(u16Msec) RTCU16MSecRegWrite(u16Msec) @@ -241,6 +239,98 @@ static const PRCM_PeriphRegs_t PRCM_PeriphRegsList[] = //***************************************************************************** // +//! Requests a safe boot +//! +//! \return None. +// +//***************************************************************************** +void PRCMRequestSafeBoot(void) +{ + unsigned short usRegValue; + + usRegValue = MAP_PRCMHIBRegRead(RTC_MSEC_U32_REG_ADDR) | (1 << 30); + + PRCMHIBRegWrite(RTC_MSEC_U32_REG_ADDR, usRegValue); +} + +//***************************************************************************** +// +//! Clear the safe boot request +//! +//! \return None. +// +//***************************************************************************** +void PRCMClearSafeBootRequest(void) +{ + unsigned short usRegValue; + + usRegValue = MAP_PRCMHIBRegRead(RTC_MSEC_U32_REG_ADDR) & (~(1 << 30)); + + PRCMHIBRegWrite(RTC_MSEC_U32_REG_ADDR, usRegValue); +} + +//***************************************************************************** +// +//! Read the safe boot request bit. This bit is cleared after reading. +//! +//! \return Value of the safe boot bit +// +//***************************************************************************** +tBoolean PRCMIsSafeBootRequested(void) +{ + tBoolean safeboot = (MAP_PRCMHIBRegRead(RTC_MSEC_U32_REG_ADDR) & (1 << 30)) ? true : false; + + PRCMClearSafeBootRequest(); + + return safeboot; +} + +//***************************************************************************** +// +//! Signals that a WDT reset has occurred +//! +//! \return None. +// +//***************************************************************************** +void PRCMSignalWDTReset(void) +{ + unsigned short usRegValue; + + usRegValue = MAP_PRCMHIBRegRead(RTC_MSEC_U32_REG_ADDR) | (1 << 29); + + PRCMHIBRegWrite(RTC_MSEC_U32_REG_ADDR, usRegValue); +} + +//***************************************************************************** +// +//! Clear the WDT reset signal +//! +//! \return None. +// +//***************************************************************************** +void PRCMClearWDTResetSignal(void) +{ + unsigned short usRegValue; + + usRegValue = MAP_PRCMHIBRegRead(RTC_MSEC_U32_REG_ADDR) & (~(1 << 29)); + + PRCMHIBRegWrite(RTC_MSEC_U32_REG_ADDR, usRegValue); +} + +//***************************************************************************** +// +//! Read the WDT reset signal bit +//! +//! \return Value of the WDT reset signal bit +// +//***************************************************************************** +tBoolean PRCMWasResetBecauseOfWDT(void) +{ + return (MAP_PRCMHIBRegRead(RTC_MSEC_U32_REG_ADDR) & (1 << 29)) ? true : false; +} + +//***************************************************************************** +// //! Performs a software reset of a SOC //! //! This function performs a software reset of a SOC @@ -304,7 +394,7 @@ void PRCMMCUReset(tBoolean bIncludeSubsystem) //! \return Returns one of the cause defined above. // //***************************************************************************** -unsigned long PRCMSysResetCauseGet() +unsigned long PRCMSysResetCauseGet(void) { unsigned long ulWakeupStatus; @@ -318,7 +408,7 @@ unsigned long PRCMSysResetCauseGet() // if(ulWakeupStatus == PRCM_POWER_ON) { - if(PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_WAKE_STATUS) & 0x1) + if(MAP_PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_WAKE_STATUS) & 0x1) { ulWakeupStatus = PRCM_HIB_EXIT; } @@ -349,8 +439,7 @@ unsigned long PRCMSysResetCauseGet() //! \return None. // //***************************************************************************** -void -PRCMPeripheralClkEnable(unsigned long ulPeripheral, unsigned long ulClkFlags) +void PRCMPeripheralClkEnable(unsigned long ulPeripheral, unsigned long ulClkFlags) { // // Enable the specified peripheral clocks, Nothing to be done for PRCM_ADC @@ -386,8 +475,7 @@ PRCMPeripheralClkEnable(unsigned long ulPeripheral, unsigned long ulClkFlags) //! \return None. // //***************************************************************************** -void -PRCMPeripheralClkDisable(unsigned long ulPeripheral, unsigned long ulClkFlags) +void PRCMPeripheralClkDisable(unsigned long ulPeripheral, unsigned long ulClkFlags) { // // Disable the specified peripheral clocks @@ -409,8 +497,7 @@ PRCMPeripheralClkDisable(unsigned long ulPeripheral, unsigned long ulClkFlags) //! \return Returns input clock frequency for specified peripheral. // //***************************************************************************** -unsigned long -PRCMPeripheralClockGet(unsigned long ulPeripheral) +unsigned long PRCMPeripheralClockGet(unsigned long ulPeripheral) { unsigned long ulClockFreq; unsigned long ulHiPulseDiv; @@ -462,8 +549,7 @@ PRCMPeripheralClockGet(unsigned long ulPeripheral) //! \return None. // //***************************************************************************** -void -PRCMPeripheralReset(unsigned long ulPeripheral) +void PRCMPeripheralReset(unsigned long ulPeripheral) { volatile unsigned long ulDelay; @@ -503,8 +589,7 @@ PRCMPeripheralReset(unsigned long ulPeripheral) //! \return Returns \b true if the peripheral is ready, \b false otherwise. // //***************************************************************************** -tBoolean -PRCMPeripheralStatusGet(unsigned long ulPeripheral) +tBoolean PRCMPeripheralStatusGet(unsigned long ulPeripheral) { unsigned long ReadyBit; @@ -546,8 +631,7 @@ PRCMPeripheralStatusGet(unsigned long ulPeripheral) //! \return None. // //***************************************************************************** -void -PRCMI2SClockFreqSet(unsigned long ulI2CClkFreq) +void PRCMI2SClockFreqSet(unsigned long ulI2CClkFreq) { unsigned long long ullDiv; unsigned short usInteger; @@ -577,8 +661,7 @@ PRCMI2SClockFreqSet(unsigned long ulI2CClkFreq) //! \return None. // //***************************************************************************** -void -PRCMLPDSRestoreInfoSet(unsigned long ulStackPtr, unsigned long ulProgCntr) +void PRCMLPDSRestoreInfoSet(unsigned long ulStackPtr, unsigned long ulProgCntr) { // // Set The SP Value @@ -602,8 +685,7 @@ PRCMLPDSRestoreInfoSet(unsigned long ulStackPtr, unsigned long ulProgCntr) //! \return None. // //***************************************************************************** -void -PRCMLPDSEnter() +void PRCMLPDSEnter(void) { // // Disable TestPD @@ -642,8 +724,7 @@ PRCMLPDSEnter() //! \return None. // //***************************************************************************** -void -PRCMLPDSWakeupSourceEnable(unsigned long ulLpdsWakeupSrc) +void PRCMLPDSWakeupSourceEnable(unsigned long ulLpdsWakeupSrc) { unsigned long ulRegVal; @@ -678,8 +759,7 @@ PRCMLPDSWakeupSourceEnable(unsigned long ulLpdsWakeupSrc) //! \return None. // //***************************************************************************** -void -PRCMLPDSWakeupSourceDisable(unsigned long ulLpdsWakeupSrc) +void PRCMLPDSWakeupSourceDisable(unsigned long ulLpdsWakeupSrc) { HWREG(GPRCM_BASE+ GPRCM_O_APPS_LPDS_WAKEUP_CFG) &= ~ulLpdsWakeupSrc; } @@ -695,8 +775,7 @@ PRCMLPDSWakeupSourceDisable(unsigned long ulLpdsWakeupSrc) //! PRCMLPDSWakeupSourceEnable(). // //***************************************************************************** -unsigned long -PRCMLPDSWakeupCauseGet() +unsigned long PRCMLPDSWakeupCauseGet(void) { return (HWREG(GPRCM_BASE+ GPRCM_O_APPS_LPDS_WAKEUP_SRC)); } @@ -714,8 +793,7 @@ PRCMLPDSWakeupCauseGet() //! \return Returns \b true on success, \b false otherwise. // //***************************************************************************** -void -PRCMLPDSIntervalSet(unsigned long ulTicks) +void PRCMLPDSIntervalSet(unsigned long ulTicks) { // // Check sleep is atleast for 21 cycles @@ -759,13 +837,12 @@ PRCMLPDSIntervalSet(unsigned long ulTicks) //! \return None. // //***************************************************************************** -void -PRCMLPDSWakeUpGPIOSelect(unsigned long ulGPIOPin, unsigned long ulType) +void PRCMLPDSWakeUpGPIOSelect(unsigned long ulGPIOPin, unsigned long ulType) { // // Set the wakeup GPIO // - PRCMHIBRegWrite(HIB3P3_BASE + HIB3P3_O_MEM_HIB_LPDS_GPIO_SEL, ulGPIOPin); + MAP_PRCMHIBRegWrite(HIB3P3_BASE + HIB3P3_O_MEM_HIB_LPDS_GPIO_SEL, ulGPIOPin); // // Set the trigger type. @@ -785,8 +862,7 @@ PRCMLPDSWakeUpGPIOSelect(unsigned long ulGPIOPin, unsigned long ulType) //! \return None. // //***************************************************************************** -void -PRCMSleepEnter() +void PRCMSleepEnter(void) { // // Request Sleep @@ -806,8 +882,7 @@ PRCMSleepEnter() //! \return None. // //***************************************************************************** -void -PRCMDeepSleepEnter() +void PRCMDeepSleepEnter(void) { // // Set bandgap duty cycle to 1 @@ -857,8 +932,7 @@ PRCMDeepSleepEnter() //! \return None. // //**************************************************************************** -void -PRCMSRAMRetentionEnable(unsigned long ulSramColSel, unsigned long ulModeFlags) +void PRCMSRAMRetentionEnable(unsigned long ulSramColSel, unsigned long ulModeFlags) { if(ulModeFlags & PRCM_SRAM_DSLP_RET) { @@ -902,8 +976,7 @@ PRCMSRAMRetentionEnable(unsigned long ulSramColSel, unsigned long ulModeFlags) //! \return None. // //**************************************************************************** -void -PRCMSRAMRetentionDisable(unsigned long ulSramColSel, unsigned long ulFlags) +void PRCMSRAMRetentionDisable(unsigned long ulSramColSel, unsigned long ulFlags) { if(ulFlags & PRCM_SRAM_DSLP_RET) { @@ -944,15 +1017,14 @@ PRCMSRAMRetentionDisable(unsigned long ulSramColSel, unsigned long ulFlags) //! \return None. // //***************************************************************************** -void -PRCMHibernateWakeupSourceEnable(unsigned long ulHIBWakupSrc) +void PRCMHibernateWakeupSourceEnable(unsigned long ulHIBWakupSrc) { unsigned long ulRegValue; // // Read the RTC register // - ulRegValue = PRCMHIBRegRead(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_WAKE_EN); + ulRegValue = MAP_PRCMHIBRegRead(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_WAKE_EN); // // Enable the RTC as wakeup source if specified @@ -962,12 +1034,12 @@ PRCMHibernateWakeupSourceEnable(unsigned long ulHIBWakupSrc) // // Enable HIB wakeup sources // - PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_WAKE_EN,ulRegValue); + MAP_PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_WAKE_EN,ulRegValue); // // REad the GPIO wakeup configuration register // - ulRegValue = PRCMHIBRegRead(HIB3P3_BASE+HIB3P3_O_MEM_GPIO_WAKE_EN); + ulRegValue = MAP_PRCMHIBRegRead(HIB3P3_BASE+HIB3P3_O_MEM_GPIO_WAKE_EN); // // Enable the specified GPIOs a wakeup sources @@ -977,7 +1049,7 @@ PRCMHibernateWakeupSourceEnable(unsigned long ulHIBWakupSrc) // // Write the new register configuration // - PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_GPIO_WAKE_EN,ulRegValue); + MAP_PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_GPIO_WAKE_EN,ulRegValue); } //***************************************************************************** @@ -993,15 +1065,14 @@ PRCMHibernateWakeupSourceEnable(unsigned long ulHIBWakupSrc) //! \return None. // //***************************************************************************** -void -PRCMHibernateWakeupSourceDisable(unsigned long ulHIBWakupSrc) +void PRCMHibernateWakeupSourceDisable(unsigned long ulHIBWakupSrc) { unsigned long ulRegValue; // // Read the RTC register // - ulRegValue = PRCMHIBRegRead(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_WAKE_EN); + ulRegValue = MAP_PRCMHIBRegRead(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_WAKE_EN); // // Disable the RTC as wakeup source if specified @@ -1011,12 +1082,12 @@ PRCMHibernateWakeupSourceDisable(unsigned long ulHIBWakupSrc) // // Disable HIB wakeup sources // - PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_WAKE_EN,ulRegValue); + MAP_PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_WAKE_EN,ulRegValue); // // Read the GPIO wakeup configuration register // - ulRegValue = PRCMHIBRegRead(HIB3P3_BASE+HIB3P3_O_MEM_GPIO_WAKE_EN); + ulRegValue = MAP_PRCMHIBRegRead(HIB3P3_BASE+HIB3P3_O_MEM_GPIO_WAKE_EN); // // Enable the specified GPIOs a wakeup sources @@ -1026,7 +1097,7 @@ PRCMHibernateWakeupSourceDisable(unsigned long ulHIBWakupSrc) // // Write the new register configuration // - PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_GPIO_WAKE_EN,ulRegValue); + MAP_PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_GPIO_WAKE_EN,ulRegValue); } @@ -1040,10 +1111,9 @@ PRCMHibernateWakeupSourceDisable(unsigned long ulHIBWakupSrc) //! \b PRCM_HIB_WAKEUP_CAUSE_GPIO // //***************************************************************************** -unsigned long -PRCMHibernateWakeupCauseGet() +unsigned long PRCMHibernateWakeupCauseGet(void) { - return ((PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_WAKE_STATUS)>>1)&0xF); + return ((MAP_PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_WAKE_STATUS)>>1)&0xF); } //***************************************************************************** @@ -1057,22 +1127,21 @@ PRCMHibernateWakeupCauseGet() //! \return Returns \b true on success, \b false otherwise. // //***************************************************************************** -void -PRCMHibernateIntervalSet(unsigned long long ullTicks) +void PRCMHibernateIntervalSet(unsigned long long ullTicks) { unsigned long long ullRTCVal; // // Latch the RTC vlaue // - PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_TIMER_READ ,0x1); + MAP_PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_TIMER_READ ,0x1); // // Read latched values as 2 32-bit vlaues // - ullRTCVal = PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_TIMER_MSW); + ullRTCVal = MAP_PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_TIMER_MSW); ullRTCVal = ullRTCVal << 32; - ullRTCVal |= PRCMHIBRegRead(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_TIMER_LSW); + ullRTCVal |= MAP_PRCMHIBRegRead(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_TIMER_LSW); // // Add the interval @@ -1082,9 +1151,9 @@ PRCMHibernateIntervalSet(unsigned long long ullTicks) // // Set RTC match value // - PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_WAKE_LSW_CONF, + MAP_PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_WAKE_LSW_CONF, (unsigned long)(ullRTCVal)); - PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_WAKE_MSW_CONF, + MAP_PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_WAKE_MSW_CONF, (unsigned long)(ullRTCVal>>32)); } @@ -1119,8 +1188,7 @@ PRCMHibernateIntervalSet(unsigned long long ullTicks) //! \return None. // //***************************************************************************** -void -PRCMHibernateWakeUpGPIOSelect(unsigned long ulGPIOBitMap, unsigned long ulType) +void PRCMHibernateWakeUpGPIOSelect(unsigned long ulGPIOBitMap, unsigned long ulType) { unsigned char ucLoop; unsigned long ulRegValue; @@ -1137,9 +1205,9 @@ PRCMHibernateWakeUpGPIOSelect(unsigned long ulGPIOBitMap, unsigned long ulType) { if(ulGPIOBitMap & (1<<ucLoop)) { - ulRegValue = PRCMHIBRegRead(HIB3P3_BASE+HIB3P3_O_MEM_GPIO_WAKE_CONF); + ulRegValue = MAP_PRCMHIBRegRead(HIB3P3_BASE+HIB3P3_O_MEM_GPIO_WAKE_CONF); ulRegValue |= (ulType << (ucLoop*2)); - PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_GPIO_WAKE_CONF, ulRegValue); + MAP_PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_GPIO_WAKE_CONF, ulRegValue); } } } @@ -1155,14 +1223,13 @@ PRCMHibernateWakeUpGPIOSelect(unsigned long ulGPIOBitMap, unsigned long ulType) //! \return None. // //***************************************************************************** -void -PRCMHibernateEnter() +void PRCMHibernateEnter(void) { // // Request hibernate. // - PRCMHIBRegWrite((HIB3P3_BASE+HIB3P3_O_MEM_HIB_REQ),0x1); + MAP_PRCMHIBRegWrite((HIB3P3_BASE+HIB3P3_O_MEM_HIB_REQ),0x1); __asm(" nop\n" " nop\n" @@ -1179,22 +1246,21 @@ PRCMHibernateEnter() //! \return 64-bit current counter vlaue. // //***************************************************************************** -unsigned long long -PRCMSlowClkCtrGet() +unsigned long long PRCMSlowClkCtrGet(void) { unsigned long long ullRTCVal; // // Latch the RTC vlaue // - PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_TIMER_READ, 0x1); + MAP_PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_TIMER_READ, 0x1); // // Read latched values as 2 32-bit vlaues // - ullRTCVal = PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_TIMER_MSW); + ullRTCVal = MAP_PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_TIMER_MSW); ullRTCVal = ullRTCVal << 32; - ullRTCVal |= PRCMHIBRegRead(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_TIMER_LSW); + ullRTCVal |= MAP_PRCMHIBRegRead(HIB3P3_BASE+HIB3P3_O_MEM_HIB_RTC_TIMER_LSW); return ullRTCVal; } @@ -1217,9 +1283,9 @@ void PRCMSlowClkCtrMatchSet(unsigned long long ullValue) // // Set RTC match value // - PRCMHIBRegWrite(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_IRQ_LSW_CONF, + MAP_PRCMHIBRegWrite(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_IRQ_LSW_CONF, (unsigned long)(ullValue)); - PRCMHIBRegWrite(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_IRQ_MSW_CONF, + MAP_PRCMHIBRegWrite(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_IRQ_MSW_CONF, (unsigned long)(ullValue>>32)); } @@ -1233,16 +1299,16 @@ void PRCMSlowClkCtrMatchSet(unsigned long long ullValue) //! \return None. // //***************************************************************************** -unsigned long long PRCMSlowClkCtrMatchGet() +unsigned long long PRCMSlowClkCtrMatchGet(void) { unsigned long long ullValue; // // Get RTC match value // - ullValue = PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_IRQ_MSW_CONF); + ullValue = MAP_PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_IRQ_MSW_CONF); ullValue = ullValue<<32; - ullValue |= PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_IRQ_LSW_CONF); + ullValue |= MAP_PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_IRQ_LSW_CONF); // // Return the value @@ -1265,7 +1331,7 @@ unsigned long long PRCMSlowClkCtrMatchGet() //***************************************************************************** void PRCMOCRRegisterWrite(unsigned char ucIndex, unsigned long ulRegValue) { - PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_HIB_REG2+(ucIndex << 2),ulRegValue); + MAP_PRCMHIBRegWrite(HIB3P3_BASE+HIB3P3_O_MEM_HIB_REG2+(ucIndex << 2),ulRegValue); } //***************************************************************************** @@ -1285,7 +1351,7 @@ unsigned long PRCMOCRRegisterRead(unsigned char ucIndex) // // Return the read value. // - return PRCMHIBRegRead(HIB3P3_BASE+HIB3P3_O_MEM_HIB_REG2 + (ucIndex << 2)); + return MAP_PRCMHIBRegRead(HIB3P3_BASE+HIB3P3_O_MEM_HIB_REG2 + (ucIndex << 2)); } //***************************************************************************** @@ -1326,7 +1392,7 @@ void PRCMIntRegister(void (*pfnHandler)(void)) //! \return None. // //***************************************************************************** -void PRCMIntUnregister() +void PRCMIntUnregister(void) { // // Enable the UART interrupt. @@ -1368,9 +1434,9 @@ void PRCMIntEnable(unsigned long ulIntFlags) // // Enable RTC interrupt // - ulRegValue = PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_IRQ_ENABLE); + ulRegValue = MAP_PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_IRQ_ENABLE); ulRegValue |= 0x1; - PRCMHIBRegWrite(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_IRQ_ENABLE, ulRegValue); + MAP_PRCMHIBRegWrite(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_IRQ_ENABLE, ulRegValue); } } @@ -1404,9 +1470,9 @@ void PRCMIntDisable(unsigned long ulIntFlags) // // Disable RTC interrupt // - ulRegValue = PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_IRQ_ENABLE); + ulRegValue = MAP_PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_IRQ_ENABLE); ulRegValue &= ~0x1; - PRCMHIBRegWrite(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_IRQ_ENABLE, ulRegValue); + MAP_PRCMHIBRegWrite(HIB3P3_BASE + HIB3P3_O_MEM_HIB_RTC_IRQ_ENABLE, ulRegValue); } } @@ -1420,7 +1486,7 @@ void PRCMIntDisable(unsigned long ulIntFlags) //! \return Returns the current interrupt status. // //***************************************************************************** -unsigned long PRCMIntStatus() +unsigned long PRCMIntStatus(void) { return HWREG(ARCM_BASE + APPS_RCM_O_APPS_RCM_INTERRUPT_STATUS); } @@ -1437,13 +1503,10 @@ unsigned long PRCMIntStatus() //! register is not available to user. Also, users must not excercise the Slow //! Clock Counter API(s), if RTC has been set for use. //! -//! The RTC feature, if set or marked, can be only reset either through reboot -//! or power cycle. -//! //! \return None. // //***************************************************************************** -void PRCMRTCInUseSet() +void PRCMRTCInUseSet(void) { RTC_USE_SET(); return; @@ -1451,6 +1514,19 @@ void PRCMRTCInUseSet() //***************************************************************************** // +//! Clear the function of RTC as being used +//! +//! \return None. +// +//***************************************************************************** +void PRCMRTCInUseClear(void) +{ + RTC_USE_CLR(); + return; +} + +//***************************************************************************** +// //! Ascertain whether function of RTC is being used //! //! This function indicates whether function of RTC is being used on the device @@ -1466,7 +1542,7 @@ void PRCMRTCInUseSet() //! \return None. // //***************************************************************************** -tBoolean PRCMRTCInUseGet() +tBoolean PRCMRTCInUseGet(void) { return IS_RTC_USED()? true : false; } @@ -1616,7 +1692,7 @@ void PRCMRTCMatchGet(unsigned long *ulSecs, unsigned short *usMsec) //! \return None // //***************************************************************************** -void PRCMCC3200MCUInit() +void PRCMCC3200MCUInit(void) { unsigned long ulRegValue; @@ -1627,11 +1703,11 @@ void PRCMCC3200MCUInit() // // Enable hibernate ECO for PG 1.32 devices only. With this ECO enabled, - // any hibernate wakeup source will be kept maked until the device enters + // any hibernate wakeup source will be kept masked until the device enters // hibernate completely (analog + digital) // - ulRegValue = PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_REG0); - PRCMHIBRegWrite(HIB3P3_BASE + HIB3P3_O_MEM_HIB_REG0, ulRegValue | (1<<4)); + ulRegValue = MAP_PRCMHIBRegRead(HIB3P3_BASE + HIB3P3_O_MEM_HIB_REG0); + MAP_PRCMHIBRegWrite(HIB3P3_BASE + HIB3P3_O_MEM_HIB_REG0, ulRegValue | (1<<4)); // // Handling the clock switching (for 1.32 only) |