diff options
| -rw-r--r-- | stmhal/irq.h | 87 |
1 files changed, 58 insertions, 29 deletions
diff --git a/stmhal/irq.h b/stmhal/irq.h index 3417345790..3c0f13d0a7 100644 --- a/stmhal/irq.h +++ b/stmhal/irq.h @@ -39,46 +39,75 @@ MP_DECLARE_CONST_FUN_OBJ(pyb_disable_irq_obj); MP_DECLARE_CONST_FUN_OBJ(pyb_enable_irq_obj); // IRQ priority definitions. +// // Lower number implies higher interrupt priority. - -#define IRQ_PRI_CAN 0x7 -#define IRQ_SUBPRI_CAN 0x0 - -#define IRQ_PRI_DMA 0x6 -#define IRQ_SUBPRI_DMA 0x0 - -#define IRQ_PRI_EXTINT 0xf -#define IRQ_SUBPRI_EXTINT 0xf +// +// The default priority grouping is set to NVIC_PRIORITYGROUP_4 in the +// HAL_Init function. This corresponds to 4 bits for the priority field +// and 0 bits for the sub-priority field (which means that for all intensive +// purposes that the sub-priorities below are ignored). +// +// While a given interrupt is being processed, only higher priority (lower number) +// interrupts will preempt a given interrupt. If sub-priorities are active +// then the sub-priority determines the order that pending interrupts of +// a given priority are executed. This is only meaningful if 2 or more +// interrupts of the same priority are pending at the same time. +// +// The priority of the SysTick timer is determined from the TICK_INT_PRIORITY +// value which is normally set to 0 in the stm32f4xx_hal_conf.h file. +// +// The following interrupts are arranged from highest priority to lowest +// priority to make it a bit easier to figure out. + +// Priority Sub-Priority +// -------- ------------ +//#def IRQ_PRI_SYSTICK 0 +//#def IRQ_SUBPRI_SYSTICK 0 // Flash IRQ must be higher priority than interrupts of all those components // that rely on the flash storage. -#define IRQ_PRI_FLASH 0x1 -#define IRQ_SUBPRI_FLASH 0x1 +#define IRQ_PRI_FLASH 1 +#define IRQ_SUBPRI_FLASH 1 -#define IRQ_PRI_OTG_FS 0x6 -#define IRQ_SUBPRI_OTG_FS 0x0 +#define IRQ_PRI_SDIO 4 +#define IRQ_SUBPRI_SDIO 0 -#define IRQ_PRI_OTG_HS 0x6 -#define IRQ_SUBPRI_OTG_HS 0x0 +// DMA should be higher priority than USB, since USB Mass Storage calls +// into the sdcard driver which waits for the DMA to complete. +#define IRQ_PRI_DMA 5 +#define IRQ_SUBPRI_DMA 0 -// PENDSV should be at the lowst priority so that other interrupts complete -// before exception is raised. -#define IRQ_PRI_PENDSV 0xf -#define IRQ_SUBPRI_PENDSV 0xf +#define IRQ_PRI_OTG_FS 6 +#define IRQ_SUBPRI_OTG_FS 0 + +#define IRQ_PRI_OTG_HS 6 +#define IRQ_SUBPRI_OTG_HS 0 -#define IRQ_PRI_RTC_WKUP 0xf -#define IRQ_SUBPRI_RTC_WKUP 0xf +#define IRQ_PRI_TIM3 6 +#define IRQ_SUBPRI_TIM3 0 -#define IRQ_PRI_TIM3 0x6 -#define IRQ_SUBPRI_TIM3 0x0 +#define IRQ_PRI_TIM5 6 +#define IRQ_SUBPRI_TIM5 0 -#define IRQ_PRI_TIM5 0x6 -#define IRQ_SUBPRI_TIM5 0x0 +#define IRQ_PRI_CAN 7 +#define IRQ_SUBPRI_CAN 0 + +#define IRQ_PRI_UART 13 +#define IRQ_SUBPRI_UART 13 // Interrupt priority for non-special timers. -#define IRQ_PRI_TIMX 0xe -#define IRQ_SUBPRI_TIMX 0xe +#define IRQ_PRI_TIMX 14 +#define IRQ_SUBPRI_TIMX 14 + +#define IRQ_PRI_EXTINT 15 +#define IRQ_SUBPRI_EXTINT 15 + +// PENDSV should be at the lowst priority so that other interrupts complete +// before exception is raised. +#define IRQ_PRI_PENDSV 15 +#define IRQ_SUBPRI_PENDSV 15 + +#define IRQ_PRI_RTC_WKUP 15 +#define IRQ_SUBPRI_RTC_WKUP 15 -#define IRQ_PRI_UART 0xd -#define IRQ_SUBPRI_UART 0xd |