diff options
| -rw-r--r-- | stmhal/dac.c | 7 | ||||
| -rw-r--r-- | stmhal/dma.h | 58 | ||||
| -rw-r--r-- | stmhal/i2c.c | 6 | ||||
| -rw-r--r-- | stmhal/spi.c | 6 |
4 files changed, 65 insertions, 12 deletions
diff --git a/stmhal/dac.c b/stmhal/dac.c index 3cd91cc41c..8573dcc2ad 100644 --- a/stmhal/dac.c +++ b/stmhal/dac.c @@ -34,6 +34,7 @@ #include "py/runtime.h" #include "timer.h" #include "dac.h" +#include "dma.h" #include "pin.h" #include "genhdr/pins.h" @@ -216,11 +217,11 @@ STATIC mp_obj_t pyb_dac_make_new(mp_obj_t type_in, mp_uint_t n_args, mp_uint_t n if (dac_id == 1) { dac->pin = GPIO_PIN_4; dac->dac_channel = DAC_CHANNEL_1; - dac->dma_stream = DMA1_Stream5; + dac->dma_stream = DMA_STREAM_DAC1; } else if (dac_id == 2) { dac->pin = GPIO_PIN_5; dac->dac_channel = DAC_CHANNEL_2; - dac->dma_stream = DMA1_Stream6; + dac->dma_stream = DMA_STREAM_DAC2; } else { nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "DAC %d does not exist", dac_id)); } @@ -396,7 +397,7 @@ mp_obj_t pyb_dac_write_timed(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_ DMA_Handle.State = HAL_DMA_STATE_READY; HAL_DMA_DeInit(&DMA_Handle); - DMA_Handle.Init.Channel = DMA_CHANNEL_7; + DMA_Handle.Init.Channel = DMA_CHANNEL_DAC1; // DAC1 & DAC2 both use the same channel DMA_Handle.Init.Direction = DMA_MEMORY_TO_PERIPH; DMA_Handle.Init.PeriphInc = DMA_PINC_DISABLE; DMA_Handle.Init.MemInc = DMA_MINC_ENABLE; diff --git a/stmhal/dma.h b/stmhal/dma.h index 3e62792613..0e751757fd 100644 --- a/stmhal/dma.h +++ b/stmhal/dma.h @@ -24,12 +24,64 @@ * THE SOFTWARE. */ -//TODO: Put stream/channel defs for i2c/spi/can, etc here +// These are ordered by DMAx_Stream number, and within a stream by channel +// number. The duplicate streams are ok as long as they aren't used at the +// same time. +// +// Currently I2C and SPI are synchronous and they call dma_init/dma_deinit +// around each transfer. + +// DMA1 streams + +#define DMA_STREAM_I2C1_RX DMA1_Stream0 +#define DMA_CHANNEL_I2C1_RX DMA_CHANNEL_1 + +#define DMA_STREAM_SPI3_RX DMA1_Stream2 +#define DMA_CHANNEL_SPI3_RX DMA_CHANNEL_0 + +#define DMA_STREAM_I2C3_RX DMA1_Stream2 +#define DMA_CHANNEL_I2C3_RX DMA_CHANNEL_3 + +#define DMA_STREAM_I2C2_RX DMA1_Stream2 +#define DMA_CHANNEL_I2C2_RX DMA_CHANNEL_7 + +#define DMA_STREAM_SPI2_RX DMA1_Stream3 +#define DMA_CHANNEL_SPI2_RX DMA_CHANNEL_0 + +#define DMA_STREAM_SPI2_TX DMA1_Stream4 +#define DMA_CHANNEL_SPI2_TX DMA_CHANNEL_0 + +#define DMA_STREAM_I2C3_TX DMA1_Stream4 +#define DMA_CHANNEL_I2C3_TX DMA_CHANNEL_3 + +#define DMA_STREAM_DAC1 DMA1_Stream5 +#define DMA_CHANNEL_DAC1 DMA_CHANNEL_7 + +#define DMA_STREAM_DAC2 DMA1_Stream6 +#define DMA_CHANNEL_DAC2 DMA_CHANNEL_7 + +#define DMA_STREAM_SPI3_TX DMA1_Stream7 +#define DMA_CHANNEL_SPI3_TX DMA_CHANNEL_0 + +#define DMA_STREAM_I2C1_TX DMA1_Stream7 +#define DMA_CHANNEL_I2C1_TX DMA_CHANNEL_1 + +#define DMA_STREAM_I2C2_TX DMA1_Stream7 +#define DMA_CHANNEL_I2C2_TX DMA_CHANNEL_7 + +// DMA2 streams + +#define DMA_STREAM_SPI1_RX DMA2_Stream2 +#define DMA_CHANNEL_SPI1_RX DMA_CHANNEL_3 + #define DMA_STREAM_SDIO_RX DMA2_Stream3 -#define DMA_CHANNEL_SDIO_RX DMA_CHANNEL_4 +#define DMA_CHANNEL_SDIO_RX DMA_CHANNEL_4 + +#define DMA_STREAM_SPI1_TX DMA2_Stream5 +#define DMA_CHANNEL_SPI1_TX DMA_CHANNEL_3 #define DMA_STREAM_SDIO_TX DMA2_Stream6 -#define DMA_CHANNEL_SDIO_TX DMA_CHANNEL_4 +#define DMA_CHANNEL_SDIO_TX DMA_CHANNEL_4 typedef union { uint16_t enabled; // Used to test if both counters are == 0 diff --git a/stmhal/i2c.c b/stmhal/i2c.c index 82f70471a9..c97629fd98 100644 --- a/stmhal/i2c.c +++ b/stmhal/i2c.c @@ -134,17 +134,17 @@ I2C_HandleTypeDef I2CHandle3 = {.Instance = NULL}; STATIC const pyb_i2c_obj_t pyb_i2c_obj[] = { #if defined(MICROPY_HW_I2C1_SCL) - {{&pyb_i2c_type}, &I2CHandle1, DMA1_Stream7, DMA_CHANNEL_1, DMA1_Stream0, DMA_CHANNEL_1}, + {{&pyb_i2c_type}, &I2CHandle1, DMA_STREAM_I2C1_TX, DMA_CHANNEL_I2C1_TX, DMA_STREAM_I2C1_RX, DMA_CHANNEL_I2C1_RX}, #else {{&pyb_i2c_type}, NULL, NULL, 0, NULL, 0}, #endif #if defined(MICROPY_HW_I2C2_SCL) - {{&pyb_i2c_type}, &I2CHandle2, DMA1_Stream7, DMA_CHANNEL_7, DMA1_Stream2, DMA_CHANNEL_7}, + {{&pyb_i2c_type}, &I2CHandle2, DMA_STREAM_I2C2_TX, DMA_CHANNEL_I2C2_TX, DMA_STREAM_I2C2_RX, DMA_CHANNEL_I2C2_RX}, #else {{&pyb_i2c_type}, NULL, NULL, 0, NULL, 0}, #endif #if defined(MICROPY_HW_I2C3_SCL) - {{&pyb_i2c_type}, &I2CHandle3, DMA1_Stream4, DMA_CHANNEL_3, DMA1_Stream2, DMA_CHANNEL_3}, + {{&pyb_i2c_type}, &I2CHandle3, DMA_STREAM_I2C3_TX, DMA_CHANNEL_I2C3_TX, DMA_STREAM_I2C3_RX, DMA_CHANNEL_I2C3_RX}, #else {{&pyb_i2c_type}, NULL, NULL, 0, NULL, 0}, #endif diff --git a/stmhal/spi.c b/stmhal/spi.c index 7458da6279..01b9665b53 100644 --- a/stmhal/spi.c +++ b/stmhal/spi.c @@ -114,17 +114,17 @@ SPI_HandleTypeDef SPIHandle3 = {.Instance = NULL}; STATIC const pyb_spi_obj_t pyb_spi_obj[] = { #if MICROPY_HW_ENABLE_SPI1 - {{&pyb_spi_type}, &SPIHandle1, DMA2_Stream5, DMA_CHANNEL_3, DMA2_Stream2, DMA_CHANNEL_3}, + {{&pyb_spi_type}, &SPIHandle1, DMA_STREAM_SPI1_TX, DMA_CHANNEL_SPI1_TX, DMA_STREAM_SPI1_RX, DMA_CHANNEL_SPI1_RX}, #else {{&pyb_spi_type}, NULL, NULL, 0, NULL, 0}, #endif #if MICROPY_HW_ENABLE_SPI2 - {{&pyb_spi_type}, &SPIHandle2, DMA1_Stream4, DMA_CHANNEL_0, DMA1_Stream3, DMA_CHANNEL_0}, + {{&pyb_spi_type}, &SPIHandle2, DMA_STREAM_SPI2_TX, DMA_CHANNEL_SPI2_TX, DMA_STREAM_SPI2_RX, DMA_CHANNEL_SPI2_RX}, #else {{&pyb_spi_type}, NULL, NULL, 0, NULL, 0}, #endif #if MICROPY_HW_ENABLE_SPI3 - {{&pyb_spi_type}, &SPIHandle3, DMA1_Stream7, DMA_CHANNEL_0, DMA1_Stream2, DMA_CHANNEL_0}, + {{&pyb_spi_type}, &SPIHandle3, DMA_STREAM_SPI3_TX, DMA_CHANNEL_SPI3_TX, DMA_STREAM_SPI3_RX, DMA_CHANNEL_SPI3_RX}, #else {{&pyb_spi_type}, NULL, NULL, 0, NULL, 0}, #endif |