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author | Dave Hylands <dhylands@gmail.com> | 2015-05-06 12:43:51 -0700 |
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committer | Damien George <damien.p.george@gmail.com> | 2015-05-06 22:16:49 +0100 |
commit | ff987ccf11ece1317ab97dbc5dd6a901ad33ddc1 (patch) | |
tree | e2a864a848876512a23dc02a92b2d4b2cf0e32b9 /stmhal | |
parent | bda7041294e0446c9909fe18c4826dd0bcfb9fc4 (diff) | |
download | micropython-ff987ccf11ece1317ab97dbc5dd6a901ad33ddc1.tar.gz micropython-ff987ccf11ece1317ab97dbc5dd6a901ad33ddc1.zip |
stmhal: Move debug UART repl to after uart_init0 call.
Diffstat (limited to 'stmhal')
-rw-r--r-- | stmhal/main.c | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/stmhal/main.c b/stmhal/main.c index d57bb2b2d4..70cb793e37 100644 --- a/stmhal/main.c +++ b/stmhal/main.c @@ -377,6 +377,17 @@ soft_reset: mp_obj_list_append(mp_sys_path, MP_OBJ_NEW_QSTR(MP_QSTR__slash_flash_slash_lib)); mp_obj_list_init(mp_sys_argv, 0); + // Initialise low-level sub-systems. Here we need to very basic things like + // zeroing out memory and resetting any of the sub-systems. Following this + // we can run Python scripts (eg boot.py), but anything that is configurable + // by boot.py must be set after boot.py is run. + + readline_init0(); + pin_init0(); + extint_init0(); + timer_init0(); + uart_init0(); + // Change #if 0 to #if 1 if you want REPL on UART_6 (or another uart) // as well as on USB VCP #if 0 @@ -391,16 +402,6 @@ soft_reset: MP_STATE_PORT(pyb_stdio_uart) = NULL; #endif - // Initialise low-level sub-systems. Here we need to very basic things like - // zeroing out memory and resetting any of the sub-systems. Following this - // we can run Python scripts (eg boot.py), but anything that is configurable - // by boot.py must be set after boot.py is run. - - readline_init0(); - pin_init0(); - extint_init0(); - timer_init0(); - uart_init0(); #if MICROPY_HW_ENABLE_CAN can_init0(); #endif |