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| author | Damien George <damien.p.george@gmail.com> | 2014-04-21 12:03:09 +0100 |
|---|---|---|
| committer | Damien George <damien.p.george@gmail.com> | 2014-04-21 12:03:09 +0100 |
| commit | 7533700393b4b5d4858e1f5745be4544b2a970cc (patch) | |
| tree | d76bd5859079d5494840670c49fe2886d1fb77e2 /stmhal/uart.h | |
| parent | 806f4aef9acd9d8990681b9ba73362d995b59417 (diff) | |
| download | micropython-7533700393b4b5d4858e1f5745be4544b2a970cc.tar.gz micropython-7533700393b4b5d4858e1f5745be4544b2a970cc.zip | |
stmhal: Rename USART to UART.
It's really a UART because there is no external clock line (and hence no
synchronous ability, at least in the implementation of this module).
USART should be reserved for a module that has "S"ynchronous capabilities.
Also, UART is shorter and easier to type :)
Diffstat (limited to 'stmhal/uart.h')
| -rw-r--r-- | stmhal/uart.h | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/stmhal/uart.h b/stmhal/uart.h new file mode 100644 index 0000000000..a66ed33c55 --- /dev/null +++ b/stmhal/uart.h @@ -0,0 +1,30 @@ +typedef enum { + PYB_UART_NONE = 0, + PYB_UART_1 = 1, + PYB_UART_2 = 2, + PYB_UART_3 = 3, + PYB_UART_4 = 4, + PYB_UART_5 = 5, + PYB_UART_6 = 6, + +#if defined(PYBV10) + PYB_UART_XA = 4, // UART4 on X1, X2 = PA0, PA1 + PYB_UART_XB = 1, // USART1 on X9, X10 = PB6, PB7 + PYB_UART_YA = 6, // USART6 on Y1, Y2 = PC6, PC7 + PYB_UART_YB = 3, // USART3 on Y9, Y10 = PB10, PB11 +#endif + +} pyb_uart_t; + +typedef struct _pyb_uart_obj_t pyb_uart_obj_t; + +extern pyb_uart_obj_t *pyb_uart_global_debug; +extern const mp_obj_type_t pyb_uart_type; + +bool uart_init(pyb_uart_obj_t *uart_obj, uint32_t baudrate); +bool uart_rx_any(pyb_uart_obj_t *uart_obj); +int uart_rx_char(pyb_uart_obj_t *uart_obj); +void uart_tx_str(pyb_uart_obj_t *uart_obj, const char *str); +void uart_tx_strn(pyb_uart_obj_t *uart_obj, const char *str, uint len); +void uart_tx_strn_cooked(pyb_uart_obj_t *uart_obj, const char *str, uint len); + |