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| author | Damien George <damien.p.george@gmail.com> | 2014-09-29 21:41:41 +0000 |
|---|---|---|
| committer | Damien George <damien.p.george@gmail.com> | 2014-09-29 21:41:41 +0000 |
| commit | dfef4249eb289ae53307d61e3bf2d5cc7339748a (patch) | |
| tree | fcb88c82ca754274f1141b0c8d82449bbc9e2e1b /py/emitnative.c | |
| parent | e9dac3b4d039997f446b6a615d580d284497d59b (diff) | |
| download | micropython-dfef4249eb289ae53307d61e3bf2d5cc7339748a.tar.gz micropython-dfef4249eb289ae53307d61e3bf2d5cc7339748a.zip | |
py: Fix viper store on x86; add tests for viper ptr16.
Diffstat (limited to 'py/emitnative.c')
| -rw-r--r-- | py/emitnative.c | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/py/emitnative.c b/py/emitnative.c index 16f0a08246..504f686bd3 100644 --- a/py/emitnative.c +++ b/py/emitnative.c @@ -1391,7 +1391,10 @@ STATIC void emit_native_store_subscr(emit_t *emit) { assert(vtype_value == VTYPE_PYOBJ); emit_call(emit, MP_F_OBJ_SUBSCR); } else { - // viper call + // viper store + // TODO The different machine architectures have very different + // capabilities and requirements for stores, so probably best to + // write a completely separate store-optimiser for each one. stack_info_t *top = peek_stack(emit, 0); if (top->vtype == VTYPE_INT && top->kind == STACK_IMM) { // index is an immediate @@ -1402,7 +1405,12 @@ STATIC void emit_native_store_subscr(emit_t *emit) { int reg_index = REG_ARG_2; int reg_value = REG_ARG_3; emit_pre_pop_reg_flexible(emit, &vtype_base, ®_base, reg_index, reg_value); + #if N_X86 + // special case: x86 needs byte stores to be from lower 4 regs (REG_ARG_3 is EDX) + emit_pre_pop_reg(emit, &vtype_value, reg_value); + #else emit_pre_pop_reg_flexible(emit, &vtype_value, ®_value, reg_base, reg_index); + #endif switch (vtype_base) { case VTYPE_PTR8: { // pointer to 8-bit memory @@ -1449,7 +1457,12 @@ STATIC void emit_native_store_subscr(emit_t *emit) { int reg_value = REG_ARG_3; emit_pre_pop_reg_flexible(emit, &vtype_index, ®_index, REG_ARG_1, reg_value); emit_pre_pop_reg(emit, &vtype_base, REG_ARG_1); + #if N_X86 + // special case: x86 needs byte stores to be from lower 4 regs (REG_ARG_3 is EDX) + emit_pre_pop_reg(emit, &vtype_value, reg_value); + #else emit_pre_pop_reg_flexible(emit, &vtype_value, ®_value, REG_ARG_1, reg_index); + #endif switch (vtype_base) { case VTYPE_PTR8: { // pointer to 8-bit memory |