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authorPaul Sokolovsky <pfalcon@users.sourceforge.net>2016-03-30 18:50:38 +0300
committerPaul Sokolovsky <pfalcon@users.sourceforge.net>2016-03-30 18:50:38 +0300
commit61fa7c81527016be164321c442fe5317daa260ee (patch)
tree27a71b6a2fa5b81b8e245ae64e5408f30c0e9095 /esp8266/uart.c
parent2e75a17bab9a3f3379546659e557f026ef70cabe (diff)
downloadmicropython-61fa7c81527016be164321c442fe5317daa260ee.tar.gz
micropython-61fa7c81527016be164321c442fe5317daa260ee.zip
esp8266: Switch back to accumulating input data via ring buffer.
But now it's generic ring buffer implemented via ringbuf.h, and is intended for any type of input, including dupterm's, not just UART. The general process work like this: an interrupt-driven input source puts data into input_buf, and then signals new data available via call to mp_hal_signal_input().
Diffstat (limited to 'esp8266/uart.c')
-rw-r--r--esp8266/uart.c20
1 files changed, 13 insertions, 7 deletions
diff --git a/esp8266/uart.c b/esp8266/uart.c
index 4f45a952ba..c4d08eac4b 100644
--- a/esp8266/uart.c
+++ b/esp8266/uart.c
@@ -159,7 +159,18 @@ static void uart0_rx_intr_handler(void *para) {
read_chars:
#if 1 //MICROPY_REPL_EVENT_DRIVEN is not available here
ETS_UART_INTR_DISABLE();
- system_os_post(UART_TASK_ID, 0, 0);
+
+ while (READ_PERI_REG(UART_STATUS(uart_no)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) {
+ uint8 RcvChar = READ_PERI_REG(UART_FIFO(uart_no)) & 0xff;
+ ringbuf_put(&input_buf, RcvChar);
+ }
+
+ mp_hal_signal_input();
+
+ // Clear pending FIFO interrupts
+ WRITE_PERI_REG(UART_INT_CLR(UART_REPL), UART_RXFIFO_TOUT_INT_CLR | UART_RXFIFO_FULL_INT_ST);
+ ETS_UART_INTR_ENABLE();
+
#else
while (READ_PERI_REG(UART_STATUS(uart_no)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) {
uint8 RcvChar = READ_PERI_REG(UART_FIFO(uart_no)) & 0xff;
@@ -224,7 +235,7 @@ void mp_keyboard_interrupt(void);
int interrupt_char;
void uart_task_handler(os_event_t *evt) {
int c, ret = 0;
- while ((c = uart_rx_one_char(UART_REPL)) >= 0) {
+ while ((c = ringbuf_get(&input_buf)) >= 0) {
if (c == interrupt_char) {
mp_keyboard_interrupt();
}
@@ -234,11 +245,6 @@ void uart_task_handler(os_event_t *evt) {
}
}
- // Clear pending FIFO interrupts
- WRITE_PERI_REG(UART_INT_CLR(UART_REPL), UART_RXFIFO_TOUT_INT_CLR | UART_RXFIFO_FULL_INT_ST);
- // Enable UART interrupts, so our task will receive events again from IRQ handler
- ETS_UART_INTR_ENABLE();
-
if (ret & PYEXEC_FORCED_EXIT) {
soft_reset();
}