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author | Mike Causer <mcauser@gmail.com> | 2016-12-21 13:48:20 +1100 |
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committer | Damien George <damien.p.george@gmail.com> | 2017-01-18 15:30:31 +1100 |
commit | a79f6676c3381d56f2085bda23cf75ba129db9c6 (patch) | |
tree | 777eaa160ab4bd1922f52dcd223183d2d2cc61b8 /docs | |
parent | af9046193148084f008501434e4c9f49fedc053f (diff) | |
download | micropython-a79f6676c3381d56f2085bda23cf75ba129db9c6.tar.gz micropython-a79f6676c3381d56f2085bda23cf75ba129db9c6.zip |
docs: Fix some minor spelling mistakes.
paramter -> parameter
send a receive -> send and receive
repsonse -> response
particualr -> particular
constructore -> constructor
Diffstat (limited to 'docs')
-rw-r--r-- | docs/library/machine.SPI.rst | 6 | ||||
-rw-r--r-- | docs/pyboard/quickref.rst | 2 | ||||
-rw-r--r-- | docs/wipy/quickref.rst | 2 |
3 files changed, 5 insertions, 5 deletions
diff --git a/docs/library/machine.SPI.rst b/docs/library/machine.SPI.rst index dda6314fa2..e8a8a2d8cc 100644 --- a/docs/library/machine.SPI.rst +++ b/docs/library/machine.SPI.rst @@ -6,7 +6,7 @@ class SPI -- a Serial Peripheral Interface bus protocol (master side) SPI is a synchronous serial protocol that is driven by a master. At the physical level, a bus consists of 3 lines: SCK, MOSI, MISO. Multiple devices can share the same bus. Each device should have a separate, 4th signal, -SS (Slave Select), to select a particualr device on a bus with which +SS (Slave Select), to select a particular device on a bus with which communication takes place. Management of an SS signal should happen in user code (via machine.Pin class). @@ -51,12 +51,12 @@ Methods - ``bits`` is the width in bits of each transfer. Only 8 is guaranteed to be supported by all hardware. - ``firstbit`` can be ``SPI.MSB`` or ``SPI.LSB``. - ``sck``, ``mosi``, ``miso`` are pins (machine.Pin) objects to use for bus signals. For most - hardware SPI blocks (as selected by ``id`` parameter to the constructore), pins are fixed + hardware SPI blocks (as selected by ``id`` parameter to the constructor), pins are fixed and cannot be changed. In some cases, hardware blocks allow 2-3 alternative pin sets for a hardware SPI block. Arbitrary pin assignments are possible only for a bitbanging SPI driver (``id`` = -1). - ``pins`` - WiPy port doesn't ``sck``, ``mosi``, ``miso`` arguments, and instead allows to - specify them as a tuple of ``pins`` paramter. + specify them as a tuple of ``pins`` parameter. .. method:: SPI.deinit() diff --git a/docs/pyboard/quickref.rst b/docs/pyboard/quickref.rst index 5f1a3a6e6b..5690dddb0c 100644 --- a/docs/pyboard/quickref.rst +++ b/docs/pyboard/quickref.rst @@ -152,7 +152,7 @@ See :ref:`pyb.SPI <pyb.SPI>`. :: spi = SPI(1, SPI.MASTER, baudrate=200000, polarity=1, phase=0) spi.send('hello') spi.recv(5) # receive 5 bytes on the bus - spi.send_recv('hello') # send a receive 5 bytes + spi.send_recv('hello') # send and receive 5 bytes I2C bus ------- diff --git a/docs/wipy/quickref.rst b/docs/wipy/quickref.rst index ac7eec1328..7a4ea7f7f3 100644 --- a/docs/wipy/quickref.rst +++ b/docs/wipy/quickref.rst @@ -102,7 +102,7 @@ See :ref:`machine.SPI <machine.SPI>`. :: spi.write('hello') spi.read(5) # receive 5 bytes on the bus rbuf = bytearray(5) - spi.write_readinto('hello', rbuf) # send a receive 5 bytes + spi.write_readinto('hello', rbuf) # send and receive 5 bytes I2C bus ------- |