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| author | Damien George <damien.p.george@gmail.com> | 2014-11-02 23:37:02 +0000 |
|---|---|---|
| committer | Damien George <damien.p.george@gmail.com> | 2014-11-02 23:37:02 +0000 |
| commit | 6e6dfdc56be2a5d6476d087043d2a4ccae139af2 (patch) | |
| tree | f63db0de4531eacf91fdc94ed34bc060c2439cef /docs/library/pyb.SPI.rst | |
| parent | 1060baa2c26d45c2641ee786581655eb44ffda90 (diff) | |
| download | micropython-6e6dfdc56be2a5d6476d087043d2a4ccae139af2.tar.gz micropython-6e6dfdc56be2a5d6476d087043d2a4ccae139af2.zip | |
docs: Make custom index page; add more docs.
Diffstat (limited to 'docs/library/pyb.SPI.rst')
| -rw-r--r-- | docs/library/pyb.SPI.rst | 18 |
1 files changed, 6 insertions, 12 deletions
diff --git a/docs/library/pyb.SPI.rst b/docs/library/pyb.SPI.rst index 7ad3a90e2d..7b765e6b06 100644 --- a/docs/library/pyb.SPI.rst +++ b/docs/library/pyb.SPI.rst @@ -93,18 +93,12 @@ Methods Constants --------- -.. data:: LSB +.. data:: SPI.MASTER +.. data:: SPI.SLAVE - set the first bit to LSB + for initialising the SPI bus to master or slave mode -.. data:: MASTER +.. data:: SPI.LSB +.. data:: SPI.MSB - for initialising the bus to master mode - -.. data:: MSB - - set the first bit to MSB - -.. data:: SLAVE - - for initialising the bus to slave mode + set the first bit to be the least or most significant bit |