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authorDamien George <damien.p.george@gmail.com>2014-01-22 22:55:07 +0000
committerDamien George <damien.p.george@gmail.com>2014-01-22 22:55:07 +0000
commitb5d13c309f00b0c959c0806c1ab11ba7a07c2cee (patch)
treee9f2a453b16edda613765f767ab69afdc4c9bf74
parent5fa93b67557f21c22a41449c3266571c427f6798 (diff)
downloadmicropython-b5d13c309f00b0c959c0806c1ab11ba7a07c2cee.tar.gz
micropython-b5d13c309f00b0c959c0806c1ab11ba7a07c2cee.zip
stm: Fix USART3 init. Small edits to Makefile and other things.
-rw-r--r--stm/Makefile30
-rw-r--r--stm/main.c4
-rw-r--r--stm/stm32fxxx_it.c18
-rw-r--r--stm/usart.c10
-rw-r--r--stm/usb.c24
-rw-r--r--stm/usb.h3
6 files changed, 68 insertions, 21 deletions
diff --git a/stm/Makefile b/stm/Makefile
index b8fcbbe4d3..6455048714 100644
--- a/stm/Makefile
+++ b/stm/Makefile
@@ -26,7 +26,7 @@ SIZE = arm-none-eabi-size
CFLAGS_CORTEX_M4 = -mthumb -mtune=cortex-m4 -mabi=aapcs-linux -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard -fsingle-precision-constant -Wdouble-promotion
CFLAGS = -I. -I$(PY_SRC) -I$(FATFSSRC) -I$(CMSIS) -I$(STMSRC) -Wall -ansi -std=gnu99 $(CFLAGS_CORTEX_M4)
-#CFLAGS += -I$(STMOTGSRC) -DUSE_HOST_MODE -DUSE_OTG_MODE
+#CFLAGS += -I$(STMOTGSRC) -DUSE_HOST_MODE #-DUSE_OTG_MODE
#Debugging/Optimization
ifeq ($(DEBUG), 1)
@@ -91,10 +91,13 @@ SRC_STM = \
stm32f4xx_dac.c \
stm32f4xx_rng.c \
stm32f4xx_i2c.c \
+ stm32f4xx_adc.c \
+ stm324x7i_eval.c \
+ stm324x7i_eval_sdio_sd.c \
usb_core.c \
+ usb_bsp.c \
usb_dcd.c \
usb_dcd_int.c \
- usb_bsp.c \
usbd_core.c \
usbd_ioreq.c \
usbd_req.c \
@@ -107,22 +110,19 @@ SRC_STM = \
usbd_msc_data.c \
usbd_msc_scsi.c \
usbd_storage_msd.c \
- stm324x7i_eval.c \
- stm324x7i_eval_sdio_sd.c \
- stm32f4xx_adc.c \
#SRC_STM_OTG = \
-# usb_hcd.c \
-# usb_hcd_int.c \
+ usb_hcd.c \
+ usb_hcd_int.c \
+ usbh_core.c \
+ usbh_hcs.c \
+ usbh_stdreq.c \
+ usbh_ioreq.c \
+ usbh_usr.c \
+ usbh_hid_core.c \
+ usbh_hid_mouse.c \
+ usbh_hid_keybd.c \
# usb_otg.c \
-# usbh_core.c \
-# usbh_hcs.c \
-# usbh_stdreq.c \
-# usbh_ioreq.c \
-# usbh_usr.c \
-# usbh_hid_core.c \
-# usbh_hid_mouse.c \
-# usbh_hid_keybd.c \
SRC_CC3K = \
cc3000_common.c \
diff --git a/stm/main.c b/stm/main.c
index 8d2c2d6b3d..acb76b012d 100644
--- a/stm/main.c
+++ b/stm/main.c
@@ -754,7 +754,7 @@ int main(void) {
storage_init();
// uncomment these 2 lines if you want REPL on USART_6 (or another usart) as well as on USB VCP
- //pyb_usart_global_debug = PYB_USART_6;
+ //pyb_usart_global_debug = PYB_USART_3;
//usart_init(pyb_usart_global_debug, 115200);
int first_soft_reset = true;
@@ -921,6 +921,8 @@ soft_reset:
// USB host; not working!
//pyb_usbh_init();
+ //rt_store_name(qstr_from_str("u_p"), rt_make_function_n(0, pyb_usbh_process));
+ //rt_store_name(qstr_from_str("u_c"), rt_make_function_n(0, pyb_usbh_connect));
if (first_soft_reset) {
#if BOARD_HAS_MMA7660
diff --git a/stm/stm32fxxx_it.c b/stm/stm32fxxx_it.c
index 22f83f8108..8e96a0121c 100644
--- a/stm/stm32fxxx_it.c
+++ b/stm/stm32fxxx_it.c
@@ -45,6 +45,8 @@ extern USB_OTG_CORE_HANDLE USB_OTG_dev;
/* Private function prototypes -----------------------------------------------*/
extern uint32_t USBD_OTG_ISR_Handler (USB_OTG_CORE_HANDLE *pdev);
+extern uint32_t USBH_OTG_ISR_Handler (USB_OTG_CORE_HANDLE *pdev);
+//extern uint32_t STM32_USBO_OTG_ISR_Handler (USB_OTG_CORE_HANDLE *pdev);
#ifdef USB_OTG_HS_DEDICATED_EP1_ENABLED
extern uint32_t USBD_OTG_EP1IN_ISR_Handler (USB_OTG_CORE_HANDLE *pdev);
@@ -163,7 +165,9 @@ void OTG_FS_WKUP_IRQHandler(void)
{
*(uint32_t *)(0xE000ED10) &= 0xFFFFFFF9 ;
SystemInit();
+#ifdef USE_DEVICE_MODE
USB_OTG_UngateClock(&USB_OTG_dev);
+#endif
}
EXTI_ClearITPendingBit(EXTI_Line18);
}
@@ -198,8 +202,18 @@ void OTG_HS_IRQHandler(void)
void OTG_FS_IRQHandler(void)
#endif
{
- USBD_OTG_ISR_Handler (&USB_OTG_dev); // device mode
- //USBH_OTG_ISR_Handler (&USB_OTG_dev); // host mode FIXME
+ if (USB_OTG_IsHostMode(&USB_OTG_dev)) {
+ // host mode
+#ifdef USE_HOST_MODE
+ USBH_OTG_ISR_Handler(&USB_OTG_dev);
+#endif
+ //STM32_USBO_OTG_ISR_Handler(&USB_OTG_dev); // USE_OTG_MODE
+ } else {
+ // device mode
+#ifdef USE_DEVICE_MODE
+ USBD_OTG_ISR_Handler(&USB_OTG_dev);
+#endif
+ }
}
#ifdef USB_OTG_HS_DEDICATED_EP1_ENABLED
diff --git a/stm/usart.c b/stm/usart.c
index 17ff146d5b..1ab385174d 100644
--- a/stm/usart.c
+++ b/stm/usart.c
@@ -77,11 +77,19 @@ void usart_init(pyb_usart_t usart_id, uint32_t baudrate) {
case PYB_USART_3:
USARTx = USART3;
+#if defined(PYBOARD4)
+ GPIO_Port = GPIOB;
+ GPIO_AF_USARTx = GPIO_AF_USART3;
+ GPIO_Pin = GPIO_Pin_10 | GPIO_Pin_11;
+ GPIO_PinSource_TX = GPIO_PinSource10;
+ GPIO_PinSource_RX = GPIO_PinSource11;
+#else
GPIO_Port = GPIOD;
GPIO_AF_USARTx = GPIO_AF_USART3;
GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9;
GPIO_PinSource_TX = GPIO_PinSource8;
GPIO_PinSource_RX = GPIO_PinSource9;
+#endif
RCC_APBxPeriph = RCC_APB1Periph_USART3;
RCC_APBxPeriphClockCmd =RCC_APB1PeriphClockCmd;
@@ -206,7 +214,7 @@ static mp_obj_t usart_obj_tx_char(mp_obj_t self_in, mp_obj_t c) {
static mp_obj_t usart_obj_tx_str(mp_obj_t self_in, mp_obj_t s) {
pyb_usart_obj_t *self = self_in;
if (self->is_enabled) {
- if (MP_OBJ_IS_TYPE(s, &str_type)) {
+ if (MP_OBJ_IS_STR(s)) {
uint len;
const byte *data = mp_obj_str_get_data(s, &len);
usart_tx_bytes(self->usart_id, data, len);
diff --git a/stm/usb.c b/stm/usb.c
index ed2b0359b9..89cc1df33f 100644
--- a/stm/usb.c
+++ b/stm/usb.c
@@ -8,9 +8,14 @@
#include "usbd_desc.h"
#include "misc.h"
+#include "mpconfig.h"
+#include "qstr.h"
+#include "obj.h"
#include "usb.h"
+#ifdef USE_DEVICE_MODE
extern CDC_IF_Prop_TypeDef VCP_fops;
+#endif
USB_OTG_CORE_HANDLE USB_OTG_dev;
@@ -22,8 +27,10 @@ static int rx_buf_out;
void usb_init(void) {
if (!is_enabled) {
// only init USB once in the device's power-lifetime
+#ifdef USE_DEVICE_MODE
USBD_Init(&USB_OTG_dev, USB_OTG_FS_CORE_ID, &USR_desc, &USBD_PYB_cb, &USR_cb);
//USBD_Init(&USB_OTG_dev, USB_OTG_FS_CORE_ID, &USR_desc, &USBD_PYB_HID_cb, &USR_cb);
+#endif
}
rx_buf_in = 0;
rx_buf_out = 0;
@@ -76,7 +83,9 @@ void usb_vcp_send_str(const char *str) {
void usb_vcp_send_strn(const char *str, int len) {
if (is_enabled) {
+#ifdef USE_DEVICE_MODE
VCP_fops.pIf_DataTx((const uint8_t*)str, len);
+#endif
}
}
@@ -84,14 +93,17 @@ void usb_vcp_send_strn(const char *str, int len) {
/* These are external variables imported from CDC core to be used for IN
transfer management. */
+#ifdef USE_DEVICE_MODE
extern uint8_t APP_Rx_Buffer []; /* Write CDC received data in this buffer.
These data will be sent over USB IN endpoint
in the CDC core functions. */
extern uint32_t APP_Rx_ptr_in; /* Increment this pointer or roll it back to
start address when writing received data
in the buffer APP_Rx_Buffer. */
+#endif
void usb_vcp_send_strn_cooked(const char *str, int len) {
+#ifdef USE_DEVICE_MODE
for (const char *top = str + len; str < top; str++) {
if (*str == '\n') {
APP_Rx_Buffer[APP_Rx_ptr_in] = '\r';
@@ -100,10 +112,13 @@ void usb_vcp_send_strn_cooked(const char *str, int len) {
APP_Rx_Buffer[APP_Rx_ptr_in] = *str;
APP_Rx_ptr_in = (APP_Rx_ptr_in + 1) & (APP_RX_DATA_SIZE - 1);
}
+#endif
}
void usb_hid_send_report(uint8_t *buf) {
+#ifdef USE_DEVICE_MODE
USBD_HID_SendReport(&USB_OTG_dev, buf, 4);
+#endif
}
/******************************************************************************/
@@ -114,6 +129,7 @@ void usb_hid_send_report(uint8_t *buf) {
#include "lib-otg/usbh_core.h"
#include "lib-otg/usbh_usr.h"
#include "lib-otg/usbh_hid_core.h"
+#include "lib-otg/usb_hcd_int.h"
__ALIGN_BEGIN USBH_HOST USB_Host __ALIGN_END ;
@@ -127,8 +143,14 @@ void pyb_usbh_init(void) {
host_is_enabled = 1;
}
-void pyb_usbh_process(void) {
+mp_obj_t pyb_usbh_process(void) {
USBH_Process(&USB_OTG_dev, &USB_Host);
+ return mp_const_none;
+}
+
+mp_obj_t pyb_usbh_connect(void) {
+ USBH_HCD_INT_fops->DevConnected(&USB_OTG_dev);
+ return mp_const_none;
}
#endif // USE_HOST_MODE
diff --git a/stm/usb.h b/stm/usb.h
index db1f0a9d37..1e634c2def 100644
--- a/stm/usb.h
+++ b/stm/usb.h
@@ -8,4 +8,5 @@ void usb_vcp_send_strn_cooked(const char *str, int len);
void usb_hid_send_report(uint8_t *buf); // 4 bytes for mouse: ?, x, y, ?
void pyb_usbh_init(void);
-void pyb_usbh_process(void);
+mp_obj_t pyb_usbh_process(void);
+mp_obj_t pyb_usbh_connect(void);