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| author | Damien George <damien.p.george@gmail.com> | 2016-11-21 23:24:24 +1100 |
|---|---|---|
| committer | Damien George <damien.p.george@gmail.com> | 2016-11-21 23:24:24 +1100 |
| commit | 7e820792dadde74ac283465b9497ad4c313db379 (patch) | |
| tree | a5767677c72aca9abe0528c63dc2f4edfb535aa5 | |
| parent | 1f43d49f9efa22d81e10be7bd20933986b4a3320 (diff) | |
| download | micropython-7e820792dadde74ac283465b9497ad4c313db379.tar.gz micropython-7e820792dadde74ac283465b9497ad4c313db379.zip | |
stmhal: Updates to get F411 MCUs compiling with latest ST HAL.
| -rw-r--r-- | stmhal/main.c | 4 | ||||
| -rw-r--r-- | stmhal/mphalport.c | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/stmhal/main.c b/stmhal/main.c index f39a86b7ae..b5d0916f3a 100644 --- a/stmhal/main.c +++ b/stmhal/main.c @@ -372,9 +372,9 @@ int main(void) { // The STM32F746 doesn't really have CCM memory, but it does have DTCM, // which behaves more or less like normal SRAM. __HAL_RCC_DTCMRAMEN_CLK_ENABLE(); - #else + #elif defined(CCMDATARAM_BASE) // enable the CCM RAM - __CCMDATARAMEN_CLK_ENABLE(); + __HAL_RCC_CCMDATARAMEN_CLK_ENABLE(); #endif #endif diff --git a/stmhal/mphalport.c b/stmhal/mphalport.c index 028756c76c..6893701f56 100644 --- a/stmhal/mphalport.c +++ b/stmhal/mphalport.c @@ -104,11 +104,11 @@ void mp_hal_gpio_clock_enable(GPIO_TypeDef *gpio) { } else if (gpio == GPIOE) { __GPIOE_CLK_ENABLE(); #endif - #ifdef __GPIOF_CLK_ENABLE + #if defined(GPIOF) && defined(__GPIOF_CLK_ENABLE) } else if (gpio == GPIOF) { __GPIOF_CLK_ENABLE(); #endif - #ifdef __GPIOG_CLK_ENABLE + #if defined(GPIOG) && defined(__GPIOG_CLK_ENABLE) } else if (gpio == GPIOG) { __GPIOG_CLK_ENABLE(); #endif |