tests: Add tests to create valid and invalid UART, I2C, SPI, CAN busses.

8 files changed, 70 insertions, 1 deletions

diff --git a/tests/pyb/can.py b/tests/pyb/can.py
index 63a3be4e92..8c86349ea9 100644
--- a/tests/pyb/can.py
+++ b/tests/pyb/can.py
@@ -1,6 +1,14 @@
 from pyb import CAN
 import pyb
 
+# test we can correctly create by id or name
+for bus in (-1, 0, 1, 2, 3, "YA", "YB", "YC"):
+    try:
+        CAN(bus, CAN.LOOPBACK)
+        print("CAN", bus)
+    except ValueError:
+        print("ValueError", bus)
+
 CAN.initfilterbanks(14)
 can = CAN(1)
 print(can)
diff --git a/tests/pyb/can.py.exp b/tests/pyb/can.py.exp
index ec6f97ea02..9ec97bfa36 100644
--- a/tests/pyb/can.py.exp
+++ b/tests/pyb/can.py.exp
@@ -1,3 +1,11 @@
+ValueError -1
+ValueError 0
+CAN 1
+CAN 2
+ValueError 3
+CAN YA
+CAN YB
+ValueError YC
 CAN(1)
 CAN(1, CAN.LOOPBACK, extframe=False)
 False
diff --git a/tests/pyb/i2c.py b/tests/pyb/i2c.py
index 1f88c8e975..a220f8e858 100644
--- a/tests/pyb/i2c.py
+++ b/tests/pyb/i2c.py
@@ -1,8 +1,15 @@
 import pyb
 from pyb import I2C
 
+# test we can correctly create by id or name
+for bus in (-1, 0, 1, 2, 3, "X", "Y", "Z"):
+    try:
+        I2C(bus)
+        print("I2C", bus)
+    except ValueError:
+        print("ValueError", bus)
+
 i2c = I2C(1)
-i2c2 = I2C(2)
 
 i2c.init(I2C.MASTER, baudrate=400000)
 print(i2c.scan())
diff --git a/tests/pyb/i2c.py.exp b/tests/pyb/i2c.py.exp
index c2b982f0fe..709fb412de 100644
--- a/tests/pyb/i2c.py.exp
+++ b/tests/pyb/i2c.py.exp
@@ -1,3 +1,11 @@
+ValueError -1
+ValueError 0
+I2C 1
+I2C 2
+ValueError 3
+I2C X
+I2C Y
+ValueError Z
 []
 [76]
 True
diff --git a/tests/pyb/spi.py b/tests/pyb/spi.py
index 24a7a85a54..16b51e7e44 100644
--- a/tests/pyb/spi.py
+++ b/tests/pyb/spi.py
@@ -1,5 +1,13 @@
 from pyb import SPI
 
+# test we can correctly create by id or name
+for bus in (-1, 0, 1, 2, 3, "X", "Y", "Z"):
+    try:
+        SPI(bus)
+        print("SPI", bus)
+    except ValueError:
+        print("ValueError", bus)
+
 spi = SPI(1)
 print(spi)
 
diff --git a/tests/pyb/spi.py.exp b/tests/pyb/spi.py.exp
index 9a557da79b..9a87b351b8 100644
--- a/tests/pyb/spi.py.exp
+++ b/tests/pyb/spi.py.exp
@@ -1,3 +1,11 @@
+ValueError -1
+ValueError 0
+SPI 1
+SPI 2
+ValueError 3
+SPI X
+SPI Y
+ValueError Z
 SPI(1)
 SPI(1, SPI.MASTER, baudrate=328125, prescaler=256, polarity=1, phase=0, bits=8)
 SPI(1, SPI.SLAVE, polarity=1, phase=1, bits=8)
diff --git a/tests/pyb/uart.py b/tests/pyb/uart.py
index dff5a56878..cb0be91c0b 100644
--- a/tests/pyb/uart.py
+++ b/tests/pyb/uart.py
@@ -1,5 +1,13 @@
 from pyb import UART
 
+# test we can correctly create by id or name
+for bus in (-1, 0, 1, 2, 3, 4, 5, 6, 7, "XA", "XB", "YA", "YB", "Z"):
+    try:
+        UART(bus, 9600)
+        print("UART", bus)
+    except ValueError:
+        print("ValueError", bus)
+
 uart = UART(1)
 uart = UART(1, 9600)
 uart = UART(1, 9600, bits=8, parity=None, stop=1)
diff --git a/tests/pyb/uart.py.exp b/tests/pyb/uart.py.exp
index 7c326c0230..40170eea97 100644
--- a/tests/pyb/uart.py.exp
+++ b/tests/pyb/uart.py.exp
@@ -1,3 +1,17 @@
+ValueError -1
+ValueError 0
+UART 1
+UART 2
+UART 3
+UART 4
+ValueError 5
+UART 6
+ValueError 7
+UART XA
+UART XB
+UART YA
+UART YB
+ValueError Z
 UART(1, baudrate=9600, bits=8, parity=None, stop=1, timeout=1000, timeout_char=0, read_buf_len=64)
 UART(1, baudrate=2400, bits=8, parity=None, stop=1, timeout=1000, timeout_char=0, read_buf_len=64)
 False